[PATCH v4 1/4] imx9: Add support for saving DDR training data to NVM
Simona Toaca
simona.toaca at oss.nxp.com
Tue Jun 2 15:46:21 CEST 2026
Hi Marek,
On Tue, Jun 02, 2026 at 01:20:57PM +0200, Marek Vasut wrote:
> On 4/30/26 10:33 AM, Simona Toaca (OSS) wrote:
>
> [...]
>
> > +static int imx_qb_spi(bool save)
> > +{
> > + struct udevice *flash;
> > + u64 offset;
> > + int ret;
> > +
[...]
> > + ret = imx_qb_get_qbdata_offset(flash, SPI_DEV, &offset);
> > + if (ret) {
> > + printf("get_qbdata_offset failed, ret = %d\n", ret);
> > + return ret;
> > + }
> > +
> > + ret = spi_flash_erase_dm(flash, offset, QB_STATE_LOAD_SIZE);
> Can you please double-check whether "offset" here is always aligned to 64
> kiB (SPI NOR erase block size) ? If not, this erase here will fail.
>
> Thank you
The erase size of the SPI NOR should actually be 4kiB. I added
a patch a while back enabling SFDP support, so that the erase size is
parsed correctly and this does not fail. I only enabled it on U-Boot,
but if you are using SPL you should enable it there too.
The only reason why I did not enable it for SPL is that there seems
to not be any defconfig for iMX95/943/952 for booting from SPI NOR.
Trying 'qb save spi' from eMMC on an iMX943 EVK (with SFDP enabled):
u-boot=> qb save spi
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 4 KiB,
total 64 MiB
u-boot=> echo $?
0
Without SFDP, 'sf probe' reports 128kiB erase size, not 64kiB.
I also do not see why I would check if the offset is a multiple of
the erase size, since the erase fails gracefully.
Best regards,
Simona
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