[PATCH 1/5] binman: Add an entry type for the Intel OSIP header

[Andy Shevchenko]

On Sun, Jun 07, 2026 at 05:05:10PM -0600, Simon Glass wrote:
> Intel Atom SoCs (Medfield, Clovertrail, Merrifield and Bay Trail) boot

Bay Trail may or may not be related to this. At least it's *not* a part of
Intel MID chips, so I would exclude it and if required add a *separate*
documentation later on. Also there is missing Moorefield to make the list
comprehensive.

> via an 'OS Image Profile' (OSIP): a 512-byte '$OS$' header which tells
> the boot ROM where the OS image lives, where to load it and where to
> start executing. On the Intel Edison (Merrifield) the OS image is
> U-Boot.
> 
> The Edison image embeds this header as the static blob
> board/intel/edison/edison-osip.dat which is an empty stub in the tree,
> so a fresh build emits an all-zero, non-functional header.
> 
> Add an 'intel-osip' entry type which builds the header from devicetree
> properties, computing the checksum and taking the load address, entry
> point, logical block address, image size and attribute as parameters.
> The same sector doubles as the eMMC's protective MBR, which the boot ROM
> requires before it loads the OS image, so emit a GPT-protective (0xee)
> partition entry and the 0x55aa signature too. Use it for the Edison
> image in place of that blob, and remove the now-unused stub file.

...

> +"""Entry-type module for an Intel OS Image Profile (OSIP) header
> +
> +This generates the 512-byte '$OS$' header used by the boot ROM on Intel Atom
> +SoCs (Medfield / Clovertrail / Merrifield / Bay Trail) to locate and load the

As per above.

> +OS image. On the Intel Edison (Merrifield) this OS image is U-Boot.
> +
> +The OS image is expected to immediately follow this header, i.e. at offset
> +0x200 in the containing section. A single OS Image Identifier (OSII) descriptor
> +is emitted, pointing at that image.
> +"""

...

> +# Sector count placed in the protective MBR entry, matching the reference
> +# Edison images. The on-disk GPT is authoritative, so this is informational.

Intel Edison

> +PROTECTIVE_MBR_SECTORS = 0x03a3e000

...

> +class Entry_intel_osip(Entry):

Is it convention to have a pattern as Entry_$name, where $name is only small letters?
If not, I would rather see this as normal Python name (CamelCase).

...

> +    Properties / Entry arguments:
> +        - intel,load-address (int): DDR address to load the OS image to
> +          (default 0x01100000)
> +        - intel,entry-point (int): Execution entry point of the OS image
> +          (default 0x01101000)

But why? We have these in the respective configuration already...

> +        - intel,lba (int): Logical block address of the image on the boot
> +          media (default 0x800)
> +        - intel,size-blocks (int): Size of the OS image in 512-byte blocks
> +          (default 0x3000)
> +        - intel,attribute (int): OSII attribute byte (default 0x0f)

...

> +        # Legacy boot signature at the end of the block
> +        data[BOOT_SIG_OFFSET] = 0x55
> +        data[BOOT_SIG_OFFSET + 1] = 0xaa

Wondering if we can do an assignment of 16-bit value.

-- 
With Best Regards,
Andy Shevchenko