[PATCH v2 7/8] arch: arm: exynos: add j7xelte binman config

Simon Glass sjg at chromium.org
Mon Jun 8 15:27:13 CEST 2026


Hi Sam,

On 2026-06-07T23:37:09, Sam Day via B4 Relay
<devnull+me.samcday.com at kernel.org> wrote:
> arch: arm: exynos: add j7xelte binman config
>
> Note that, as of this commit, j7xelte does not yet exist in U-Boot's
> upstream DTS tree. It was accepted into next so it should appear here
> eventually.
>
> S-BOOT expects a DTBH with hw-rev == 6.
>
> Link: https://lore.kernel.org/all/177209522223.26390.6219893536178441080.b4-ty@kernel.org/
> Signed-off-by: Sam Day <me at samcday.com>
>
> arch/arm/dts/exynos7870-j7xelte-u-boot.dtsi | 24 ++++++++++++++++++++++++
>  1 file chang
> diff --git a/arch/arm/dts/exynos7870-j7xelte-u-boot.dtsi b/arch/arm/dts/exynos7870-j7xelte-u-boot.dtsi
> @@ -0,0 +1,24 @@
> +     binman {
> +             filename = 'u-boot-samsung-j7xelte.img';
> +             android-boot {
> +                     kernel {
> +                             u-boot-nodtb {};
> +                     };

No 'base' is set, so android_boot falls back to its default of
0x10000000, putting the kernel_addr field in the abootimg header at
0x10008000 - nowhere near Exynos7870 DRAM at 0x40000000. Does S-BOOT
on j7xelte ignore the load addresses in the header (so the defaults
are harmless), or do you need to set base = <0x40000000> explicitly? A
short note in the commit message on what S-BOOT does with those fields
would help.

> diff --git a/arch/arm/dts/exynos7870-j7xelte-u-boot.dtsi b/arch/arm/dts/exynos7870-j7xelte-u-boot.dtsi
> @@ -0,0 +1,24 @@
> +                     vendor-dt {
> +                             dtbh {
> +                                     dtb-0 {
> +                                             u-boot-dtb { };
> +                                     };
> +                             };
> +                     };

Does this indenting use tabs? It should.

'S-BOOT expects a DTBH with hw-rev == 6' is terse - worth a sentence
explaining that this pins both hw_rev and hw_rev_end to 6, contrasting
with the wider 0..255 range used by the j6lte overlay, so it's clear
why that DTSI's approach wasn't reused.

Regards,
Simon


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