[PATCH v4 5/9] arm: socfpga: s10: Enable system manager driver for Stratix10

[Chee, Tien Fong]

On 5/6/2026 9:54 am, alif.zakuan.yuslaimi at altera.com wrote:
> From: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
>
> The base address of system manager can be retrieved
> using DT framework through the system manager driver.
>
> Enable system manager support for Stratix10 by probing the
> system manager driver to initialize during SPL boot up.
>
> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi at altera.com>
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - SPDX-License-Identifier format correction in
>    board/altera/stratix10-socdk/Makefile
>
>   MAINTAINERS                                |  1 +
>   arch/arm/dts/socfpga_stratix10-u-boot.dtsi |  6 ++++++
>   arch/arm/mach-socfpga/Makefile             |  1 +
>   arch/arm/mach-socfpga/misc.c               |  3 ++-
>   arch/arm/mach-socfpga/spl_s10.c            |  1 +
>   board/altera/stratix10-socdk/Makefile      |  6 ++++++
>   board/altera/stratix10-socdk/socfpga.c     | 12 ++++++++++++
>   configs/socfpga_stratix10_defconfig        |  1 +
>   8 files changed, 30 insertions(+), 1 deletion(-)
>   create mode 100644 board/altera/stratix10-socdk/Makefile
>   create mode 100644 board/altera/stratix10-socdk/socfpga.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 571af196465..bc4abd21dbc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -168,6 +168,7 @@ S:	Maintained
>   T:	git https://source.denx.de/u-boot/custodians/u-boot-socfpga.git
>   F:	arch/arm/dts/socfpga_*
>   F:	arch/arm/mach-socfpga/
> +F:	board/altera/stratix10-socdk/
>   F:	board/intel/agilex-socdk/
>   F:	configs/socfpga_*
>   F:	drivers/ddr/altera/
> diff --git a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10-u-boot.dtsi
> index ad4b383f704..89fa0e829f6 100644
> --- a/arch/arm/dts/socfpga_stratix10-u-boot.dtsi
> +++ b/arch/arm/dts/socfpga_stratix10-u-boot.dtsi
> @@ -13,6 +13,7 @@
>   	aliases {
>   		spi0 = &qspi;
>   		i2c0 = &i2c1;
> +		sysmgr = &sysmgr;
>   		freeze_br0 = &freeze_controller;
>   	};
>   
> @@ -283,6 +284,11 @@
>   	};
>   };
>   
> +&sysmgr {
> +	compatible = "altr,sys-mgr", "syscon";
> +	bootph-all;
> +};
> +
>   &uart0 {
>   	bootph-all;
>   	clock-frequency = <100000000>;
> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
> index b6f35ddacc4..962dce67c64 100644
> --- a/arch/arm/mach-socfpga/Makefile
> +++ b/arch/arm/mach-socfpga/Makefile
> @@ -39,6 +39,7 @@ obj-y	+= system_manager_soc64.o
>   obj-y	+= timer_s10.o
>   obj-y	+= wrap_handoff_soc64.o
>   obj-y	+= wrap_pll_config_soc64.o
> +obj-y	+= altera-sysmgr.o
>   endif
>   
>   ifdef CONFIG_ARCH_SOCFPGA_AGILEX
> diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
> index 1eef7893e54..418d7dfb572 100644
> --- a/arch/arm/mach-socfpga/misc.c
> +++ b/arch/arm/mach-socfpga/misc.c
> @@ -263,7 +263,8 @@ void socfpga_get_managers_addr(void)
>   
>   	if (!IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX) &&
>   	    !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX7M) &&
> -	    !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5)) {
> +	    !IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX5) &&
> +	    !IS_ENABLED(CONFIG_ARCH_SOCFPGA_STRATIX10)) {
>   		ret = socfpga_get_base_addr("altr,sys-mgr",
>   					    &socfpga_sysmgr_base);
>   		if (ret)
> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
> index 00d43460fce..893579f17c1 100644
> --- a/arch/arm/mach-socfpga/spl_s10.c
> +++ b/arch/arm/mach-socfpga/spl_s10.c
> @@ -48,6 +48,7 @@ void board_init_f(ulong dummy)
>   	if (ret)
>   		hang();
>   
> +	socfpga_get_sys_mgr_addr();
>   	socfpga_get_managers_addr();
>   
>   	/* Ensure watchdog is paused when debugging is happening */
> diff --git a/board/altera/stratix10-socdk/Makefile b/board/altera/stratix10-socdk/Makefile
> new file mode 100644
> index 00000000000..2e105adf942
> --- /dev/null
> +++ b/board/altera/stratix10-socdk/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0
> +#
> +# Copyright (C) 2026 Altera Corporation <www.altera.com>
> +#
> +
> +obj-y	:= socfpga.o
> diff --git a/board/altera/stratix10-socdk/socfpga.c b/board/altera/stratix10-socdk/socfpga.c
> new file mode 100644
> index 00000000000..f8facf79204
> --- /dev/null
> +++ b/board/altera/stratix10-socdk/socfpga.c
> @@ -0,0 +1,12 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2026 Altera Corporation <www.altera.com>
> + */
> +
> +#include <asm/arch/misc.h>
> +
> +int board_early_init_f(void)
> +{
> +	socfpga_get_sys_mgr_addr();
> +	return 0;
> +}
> diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
> index be0c452ead0..53864251f29 100644
> --- a/configs/socfpga_stratix10_defconfig
> +++ b/configs/socfpga_stratix10_defconfig
> @@ -28,6 +28,7 @@ CONFIG_QSPI_BOOT=y
>   CONFIG_BOOTDELAY=5
>   CONFIG_USE_BOOTARGS=y
>   CONFIG_BOOTARGS="earlycon panic=-1"
> +CONFIG_BOARD_EARLY_INIT_F=y
>   CONFIG_SPL_MAX_SIZE=0x40000
>   # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
>   # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set


Reviewed-by: Tien Fong Chee <tien.fong.chee at altera.com>

Best regards,
Tien Fong