[PATCH 0/2] mach-omap2: am33xx: ddr JEDEC spec fixups

[Bryan Brattlof]

Hello Everyone.

Someone figured out that we do not wait long enough for the DDR chip to 
be ready during initializing. During that debug it was also discovered 
we don't handle warm resets correctly. These 2 patches should fix this.

I don't have a scope fast enough to prove these patches have fixed the 
reported issues but I am boot testing (cold and warm resets) with a BBB 
at my desk which seems to be OK with these applied.

With how old these platforms are I doubt we will see any issue on our 
current devices and probably need a different DDR part to see any 
stability improvements but these should help stabilize board wakeups 
with different DDR parts. 

Happy Hacking
~Bryan

Signed-off-by: Bryan Brattlof <bb at ti.com>
---
Bryan Brattlof (2):
      arm: mach-omap2: am33xx: ddr: ensure proper reset->cke delay
      arm: mach-omap2: am33xx: check VTP before reinitalizing

 arch/arm/mach-omap2/am33xx/ddr.c   |  2 +-
 arch/arm/mach-omap2/am33xx/emif4.c | 21 +++++++++++++++------
 2 files changed, 16 insertions(+), 7 deletions(-)
---
base-commit: fcda974e36033ad5331a9b4a4a551af4e141ad7d
change-id: 20251028-335-ddr-cke-delay-9d739233d77e

Best regards,
--  
Bryan Brattlof <bb at ti.com>