[PATCH 1/1] rockchip: rk3568: Add support for LinkEase EasePi R1

Quentin Schulz quentin.schulz at cherry.de
Wed Jun 24 17:46:36 CEST 2026


Hi Liangbin Lian,

On 5/12/26 11:15 AM, Liangbin Lian wrote:
> LinkEase EasePi R1 [1] is a high-performance mini router.
> 
> Specification:
> - Rockchip RK3568
> - 2GB/4GB LPDDR4 RAM
> - 16GB on-board eMMC
> - 1x M.2 key for 2280 NVMe (PCIe 3.0)
> - 1x USB 3.0 Type-A
> - 1x USB 2.0 Type-C (for USB flashing)
> - 2x 1000 Base-T (native, RTL8211F)
> - 2x 2500 Base-T (PCIe, RTL8125B)
> - 1x HDMI 2.0 Output
> - 12v DC Jack
> - 1x Power key connected to PMIC
> - 2x LEDs (one static power supplied, one GPIO controlled)
> 
> [1] https://doc.linkease.com/zh/guide/easepi-r1/hardware.html
> 

Note that this link times out on my side.

> Signed-off-by: Liangbin Lian <jjm2473 at gmail.com>
> ---
>   arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi |  7 ++
>   board/rockchip/evb_rk3568/MAINTAINERS     |  6 ++
>   configs/easepi-r1-rk3568_defconfig        | 82 +++++++++++++++++++++++
>   doc/board/rockchip/rockchip.rst           |  1 +
>   4 files changed, 96 insertions(+)
>   create mode 100644 arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi
>   create mode 100644 configs/easepi-r1-rk3568_defconfig
> 
> diff --git a/arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi b/arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi
> new file mode 100644
> index 000000000..dc0e0eb7e
> --- /dev/null
> +++ b/arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi
> @@ -0,0 +1,7 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
> +/*
> + * (C) Copyright 2021 Rockchip Electronics Co., Ltd
> + * (C) Copyright 2026 Liangbin Lian <jjm2473 at gmail.com>
> + */
> +
> +#include "rk356x-u-boot.dtsi"

This file is not necessary. When rk3568-easepi-r1-u-boot.dtsi is 
missing, rk3568-u-boot.dtsi will be automatically included, which in 
turn automatically includes rk356x-u-boot.dtsi.

> diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS
> index 030cdbe6f..4dfc3d870 100644
> --- a/board/rockchip/evb_rk3568/MAINTAINERS
> +++ b/board/rockchip/evb_rk3568/MAINTAINERS
> @@ -5,6 +5,12 @@ F:	configs/bpi-r2-pro-rk3568_defconfig
>   F:	arch/arm/dts/rk3568-bpi-r2-pro.dts
>   F:	arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
>   
> +EASEPI-R1
> +M:	Liangbin Lian <jjm2473 at gmail.com>
> +S:	Maintained
> +F:	configs/easepi-r1-rk3568_defconfig
> +F:	arch/arm/dts/rk3568-easepi-r1-u-boot.dtsi

Then you don't need this line either.

> +
>   EVB-RK3568
>   M:	Joseph Chen <chenjh at rock-chips.com>
>   S:	Maintained
> diff --git a/configs/easepi-r1-rk3568_defconfig b/configs/easepi-r1-rk3568_defconfig
> new file mode 100644
> index 000000000..c76960379
> --- /dev/null
> +++ b/configs/easepi-r1-rk3568_defconfig
> @@ -0,0 +1,82 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-easepi-r1"
> +CONFIG_ROCKCHIP_RK3568=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_DEBUG_UART_BASE=0xFE660000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_PCI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y

Do you really need this?

> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-easepi-r1.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x40000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_ROCKUSB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_PMIC=y
> +CONFIG_CMD_REGULATOR=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"

Do you really need to remove clock-names from the xPL DTB? I know most 
Rockchip configs do it but I think it's mostly because everybody's 
copying everybody :)

Looking good otherwise, thanks for the patch!

Cheers,
Quentin


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