[PATCH v4 14/19] arm: mach-k3: j784s4: Enable LPM resume flow for J784s4/J742s2 SOCs
Richard Genoud (TI)
richard.genoud at bootlin.com
Thu Jun 25 09:15:10 CEST 2026
Add support for resuming from suspend in board_init_f.
The resume state of the SOC is identified and lpm resume
sequence is followed accordingly.
First, add the board specific part of the exit retention sequence for
k3-ddrss following the DDR resume sequence:
- exit DDR from retention
- de-assert the DDR_RET pin
- restore DDR max frequency
- exit DDR from low power
The self-refresh exit sequence is performed in a loop for each DDR
controller. (J784S4 has 4 DDR controllers and J742S2 has only 2)
Select the number of ddr controllers on the basis of
CONFIG_TARGET_J742S2_R5_EVM build flag.
Then:
- Extract context address from devicetree and send to TIFS.
- Power on the rproc cluster.
- Replay the certificates attached to saved images of ATF and OPTEE.
- Resume sequence for context restore and rproc resume.
- Image entry to DM firmware.
(All those steps are done in do_resume())
The context address area is firewalled by TIFS to protect it from
other hosts.
Co-developed-by: Gregory CLEMENT (TI) <gregory.clement at bootlin.com>
Signed-off-by: Gregory CLEMENT (TI) <gregory.clement at bootlin.com>
Signed-off-by: Thomas Richard (TI) <thomas.richard at bootlin.com>
Co-developed-by: Prasanth Babu Mantena <p-mantena at ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena at ti.com>
Co-developed-by: Abhash Kumar Jha <a-kumar2 at ti.com>
Signed-off-by: Abhash Kumar Jha <a-kumar2 at ti.com>
Signed-off-by: Richard Genoud (TI) <richard.genoud at bootlin.com>
---
arch/arm/mach-k3/j784s4/j784s4_init.c | 44 +++++++++++++++++++++++++--
board/ti/j784s4/evm.c | 3 +-
2 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c
index 507b7ab685ad..d49249fa233a 100644
--- a/arch/arm/mach-k3/j784s4/j784s4_init.c
+++ b/arch/arm/mach-k3/j784s4/j784s4_init.c
@@ -18,11 +18,21 @@
#include <mmc.h>
#include <remoteproc.h>
#include <k3_bist.h>
+#include <power/pmic.h>
+#include <mach/k3-ddr.h>
#include "../sysfw-loader.h"
#include "../common.h"
+#include "../lpm-common.h"
-#define J784S4_MAX_DDR_CONTROLLERS 4
+#if IS_ENABLED(CONFIG_TARGET_J742S2_R5_EVM)
+#define MAX_DDR_CONTROLLERS 2
+#else
+#define MAX_DDR_CONTROLLERS 4
+#endif
+
+/* DDR retention bits */
+#define DDR_RET_VAL BIT(5)
#define CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL 0x001082e4
#define AUDIO_REFCLK1_DEFAULT 0x1c
@@ -279,20 +289,50 @@ void k3_mem_init(void)
int ret, ctrl = 0;
if (IS_ENABLED(CONFIG_K3_J721E_DDRSS)) {
+ struct udevice *devs[MAX_DDR_CONTROLLERS];
+ struct k3_ddrss_regs regs[MAX_DDR_CONTROLLERS];
+
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
panic("DRAM 0 init failed: %d\n", ret);
+
+ devs[0] = dev;
ctrl++;
- while (ctrl < J784S4_MAX_DDR_CONTROLLERS) {
+ while (ctrl < MAX_DDR_CONTROLLERS) {
ret = uclass_next_device_err(&dev);
if (ret == -ENODEV)
break;
if (ret)
panic("DRAM %d init failed: %d\n", ctrl, ret);
+ devs[ctrl] = dev;
ctrl++;
}
+
+ if (j7xx_board_is_resuming()) {
+ /* exit DDRs from retention */
+ for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++) {
+ k3_ddrss_lpddr4_exit_retention(devs[ctrl],
+ ®s[ctrl]);
+ }
+
+ /* de-assert DDR_RET pin */
+ k3_deassert_ddr_ret("pmic at 48", DDR_RET_VAL, 0, false);
+
+ /* restore DDR max frequency */
+ for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++)
+ k3_ddrss_lpddr4_change_freq(devs[ctrl]);
+
+ /* exit DDR from low power */
+ for (ctrl = 0; ctrl < MAX_DDR_CONTROLLERS; ctrl++) {
+ k3_ddrss_lpddr4_exit_low_power(devs[ctrl],
+ ®s[ctrl]);
+ }
+ printf("Initialized %d DRAM controllers\n", ctrl);
+
+ do_resume();
+ }
printf("Initialized %d DRAM controllers\n", ctrl);
}
diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c
index 179a26d570fd..3b345528be5f 100644
--- a/board/ti/j784s4/evm.c
+++ b/board/ti/j784s4/evm.c
@@ -61,7 +61,8 @@ int board_late_init(void)
}
#endif
-#if (IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM))
+#if (IS_ENABLED(CONFIG_SPL_BUILD) && (IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM) || \
+ IS_ENABLED(CONFIG_TARGET_J742S2_R5_EVM)))
void clear_isolation(void)
{
int ret;
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