[PATCH v4 00/19] Introduce resume for J7xx SoCs

[Thomas Richard]

Hi Richard,

On 6/25/26 9:14 AM, Richard Genoud (TI) wrote:
> This series allows J7200/J721e/J721s2/J784s4/J722s to resume from
> suspend.
> 
> On those SoCs, a magic value is set in a PMIC register by the DM
> firmware just before suspend, then everything but the PMIC and DDR is
> powered off.
> At resume/boot time, the magic value has to be read back by U-Boot SPL in
> order to know if we are indeed in a resume situation.
> That's the purpose of j7xx_board_is_resuming() introduced here.
> 
> Then, if the SoC is resuming, the DDR has to be brought out of
> retention, at full speed and get out of low power mode.
> Between those steps, the DDR_RET pin has to be de-asserted. But the
> DDR_RET pins of all DDR chips are tied together on a single GPIO, so
> it's impossible to resume one DDR chip after the other, they must be all
> resumed at once.
> That's why it's orchestrated from board_init_f() and not in the k3ddrss
> driver.
> 
> Once the DDR is fully functional, the next steps are:
> - retrieve the LPM memory region from DTS
> - authenticate certificates from LPM memory region and apply firewalls
> - ask TIFS to restore TFA and its own minimal context
> - start TFA on remote proc
> - load and jump to DM
> 
> Patches 1-3 add LPM helpers for all SoCs
> Patch 4 adds the resume detection for all SoCs
> Patch 5 adds common code for DDR retention pin
> Patch 6 enables GTC at resume
> Patch 7 detects IO+DDR resume state for j7200/j784s4
> Patch 8 stores the wakeup reason in MCU_PSRAM0_RAM for j7200/j784s4
> Patch 9 sets the PMIC NSLEEP triggers
> Patches 10-12 add the DDR resume sequence for all SoCs
> Patches 13-16 add the resume flow for all SoCs
> Patch 17 updates the pm-cfg and schema to a new version
> Patch 18 removes now unneeded background firewall on DDR for j7200/j784s4
> Patch 19 extends the firewall for ATF region to TIFS
> 
> Tested on J722s HS-FS, J7200 GP, J784s4 GP, J721s2 GP
> 
> BEWARE: This series is based on:
>  commit 8d5f30b52f7c ("Merge patch series "env: migrate static flags list to Kconfig"")
>  + AM62 LPM series:
> https://lore.kernel.org/u-boot/20260105-topic-am62-ioddr-v2025-04-rc1-v9-0-7e33f2c77dbf@baylibre.com/
> 
> It needs lpm_memory_regions described in DTS:
> https://lore.kernel.org/lkml/20260427160326.370415-1-richard.genoud@bootlin.com/
> 
> It also needs a bootph-pre-ram property in PMIC-B for j721s2:
> https://lore.kernel.org/linux-arm-kernel/20260429-k3-j721s2-som-bootph-pre-ram-pmic-4c-v2-1-31a0e7677216@bootlin.com/
> 

Tested-by: Thomas Richard (TI) <thomas.richard at bootlin.com> # J7200 SR1.0 GP, J721S2 SR1.0 GP

Best Regards,
Thomas