[PATCH 2/2] clk/qcom: milos: Add TCSRCC clocks

[Casey Connolly]

On 6/25/26 15:14, Luca Weiss wrote:
> With a recent change to the UFS driver, now all clocks need to be
> available. Add all the clocks from the TCSRCC block on Milos.
> 
> Signed-off-by: Luca Weiss <luca.weiss at fairphone.com>

Reviewed-by: Casey Connolly <casey.connolly at linaro.org>

> ---
>   drivers/clk/qcom/clock-milos.c | 66 ++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 66 insertions(+)
> 
> diff --git a/drivers/clk/qcom/clock-milos.c b/drivers/clk/qcom/clock-milos.c
> index 571cd134f1c..54103adc114 100644
> --- a/drivers/clk/qcom/clock-milos.c
> +++ b/drivers/clk/qcom/clock-milos.c
> @@ -15,6 +15,7 @@
>   #include <linux/bitops.h>
>   #include <dt-bindings/clock/qcom,milos-gcc.h>
>   #include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/clock/qcom,sm8650-tcsr.h>
>   
>   #include "clock-qcom.h"
>   
> @@ -201,3 +202,68 @@ U_BOOT_DRIVER(milos_rpmh_clk) = {
>   	.ops		= &milos_rpmh_clk_ops,
>   	.flags		= DM_FLAG_DEFAULT_PD_CTRL_OFF,
>   };
> +
> +/* TCSRCC */
> +
> +static const struct gate_clk milos_tcsr_clks[] = {
> +	GATE_CLK(TCSR_PCIE_0_CLKREF_EN,		0x31100, BIT(0)),
> +	GATE_CLK(TCSR_PCIE_1_CLKREF_EN,		0x31114, BIT(0)),
> +	GATE_CLK(TCSR_UFS_CLKREF_EN,		0x31118, BIT(0)),
> +	GATE_CLK(TCSR_UFS_PAD_CLKREF_EN,	0x31104, BIT(0)),
> +};
> +
> +static struct msm_clk_data milos_tcsrcc_data = {
> +	.clks = milos_tcsr_clks,
> +	.num_clks = ARRAY_SIZE(milos_tcsr_clks),
> +};
> +
> +static int tcsrcc_milos_clk_enable(struct clk *clk)
> +{
> +	struct msm_clk_priv *priv = dev_get_priv(clk->dev);
> +
> +	qcom_gate_clk_en(priv, clk->id);
> +
> +	return 0;
> +}
> +
> +static ulong tcsrcc_milos_clk_get_rate(struct clk *clk)
> +{
> +	return TCXO_RATE;
> +}
> +
> +static int tcsrcc_milos_clk_probe(struct udevice *dev)
> +{
> +	struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev);
> +	struct msm_clk_priv *priv = dev_get_priv(dev);
> +
> +	priv->base = dev_read_addr(dev);
> +	if (priv->base == FDT_ADDR_T_NONE)
> +		return -EINVAL;
> +
> +	priv->data = data;
> +
> +	return 0;
> +}
> +
> +static struct clk_ops tcsrcc_milos_clk_ops = {
> +	.enable = tcsrcc_milos_clk_enable,
> +	.get_rate = tcsrcc_milos_clk_get_rate,
> +};
> +
> +static const struct udevice_id tcsrcc_milos_of_match[] = {
> +	{
> +		.compatible = "qcom,milos-tcsr",
> +		.data = (ulong)&milos_tcsrcc_data,
> +	},
> +	{ }
> +};
> +
> +U_BOOT_DRIVER(tcsrcc_milos) = {
> +	.name		= "tcsrcc_milos",
> +	.id		= UCLASS_CLK,
> +	.of_match	= tcsrcc_milos_of_match,
> +	.ops		= &tcsrcc_milos_clk_ops,
> +	.priv_auto	= sizeof(struct msm_clk_priv),
> +	.probe		= tcsrcc_milos_clk_probe,
> +	.flags		= DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
> +};
>