[PATCH] rockchip: sdram: Fix initialization of DRAM banks

[Ilias Apalodimas]

Thanks Jonas

On Sat, 27 Jun 2026 at 23:24, Jonas Karlman <jonas at kwiboo.se> wrote:

> The commit 55a342176984 ("common: Add an option to relocate on ram top")
> changed so that dram_init_banksize() is called before gd->ram_top has
> been initialized. This change broke Rockchip DRAM banks configuration
> due to gd->ram_top now being 0 when dram_init_banksize() is called.
>
> This makes first DRAM bank size calculation overflow and end up with
>
>   DRAM bank   = 0x0000000000000000
>   -> start    = 0x0000000000200000
>   -> size     = 0xffffffffffe00000
>
> instead of the expected (for 2 GiB)
>
>   DRAM bank   = 0x0000000000000000
>   -> start    = 0x0000000000200000
>   -> size     = 0x000000007fe00000
>
> or (for 4 GiB)
>
>   DRAM bank   = 0x0000000000000000
>   -> start    = 0x0000000000200000
>   -> size     = 0x00000000f7e00000
>
> on e.g. RK3399 boards.
>
> Change to not depend on gd->ram_top having to be pre-calculated before
> dram_init_banksize() is called, also move the related method
> board_get_usable_ram_top() closer to more easily get an overview of
> their interdependence, to restore working DRAM bank initialization.
>
> Fixes: 55a342176984 ("common: Add an option to relocate on ram top")
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
> ---


I tested in on one board I got available

SoC: Rockchip rk3399
Reset cause: unknown reset
Model: Radxa ROCK Pi 4A
DRAM:  4 GiB (total 3.9 GiB)

[...]

=> bdinfo
boot_params = 0x0000000000000000
DRAM bank   = 0x0000000000000000
-> start    = 0x0000000000200000
-> size     = 0x00000000f7e00000
flashstart  = 0x0000000000000000
flashsize   = 0x0000000000000000
flashoffset = 0x0000000000000000
baudrate    = 1500000 bps
relocaddr   = 0x00000000f3f0c000
reloc off   = 0x00000000f370c000
Build       = 64-bit
current eth = ethernet at fe300000
ethaddr     = e6:9a:46:f0:87:25
IP addr     = <NULL>
fdt_blob    = 0x00000000f1eeccf0
Video       = vop at ff8f0000 inactive
Video       = vop at ff900000 inactive
lmb_dump_all:
 memory.count = 0x1
 memory[0]      [0x200000-0xf7ffffff], 0xf7e00000 bytes, flags: none
 reserved.count = 0x2
 reserved[0]    [0xf0ee7000-0xf0eebfff], 0x5000 bytes, flags: no-notify,
no-overwrite
 reserved[1]    [0xf0eecce0-0xf7ffffff], 0x7113320 bytes, flags:
no-overwrite
devicetree  = separate
serial addr = 0x00000000ff1a0000
 width      = 0x0000000000000004
 shift      = 0x0000000000000002
 offset     = 0x0000000000000000
 clock      = 0x00000000016e3600
arch_number = 0x0000000000000000
TLB addr    = 0x00000000f7ff0000
irq_sp      = 0x00000000f1eecce0
sp start    = 0x00000000f1eecce0
Early malloc usage: 2510 / 10000

Reported-by: Ilias Apalodimas <ilias.apalodimas at linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas at linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas at linaro.org> # on Radxa ROCK
Pi 4A


>  arch/arm/mach-rockchip/sdram.c | 22 ++++++++++++----------
>  1 file changed, 12 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/sdram.c
> b/arch/arm/mach-rockchip/sdram.c
> index f0923186fa61..2e404df1b200 100644
> --- a/arch/arm/mach-rockchip/sdram.c
> +++ b/arch/arm/mach-rockchip/sdram.c
> @@ -294,10 +294,20 @@ __weak int rockchip_dram_init_banksize_fixup(struct
> bd_info *bd)
>         return 0;
>  }
>
> +phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
> +{
> +       /* Make sure U-Boot only uses the space below the 4G address
> boundary */
> +       u64 usable_top = min_t(u64, CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE,
> SZ_4G);
> +
> +       return (gd->ram_top > usable_top) ? usable_top : gd->ram_top;
> +}
> +
>  int dram_init_banksize(void)
>  {
> -       size_t ram_top = (unsigned long)(gd->ram_size +
> CFG_SYS_SDRAM_BASE);
> -       size_t top = min((unsigned long)ram_top, (unsigned
> long)(gd->ram_top));
> +       /* Make sure first bank uses the space below the 4G address
> boundary */
> +       u64 usable_top = min_t(u64, CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE,
> SZ_4G);
> +       size_t ram_top = (unsigned long)(CFG_SYS_SDRAM_BASE +
> gd->ram_size);
> +       size_t top = min((unsigned long)ram_top, (unsigned
> long)(usable_top));
>
>  #ifdef CONFIG_ARM64
>         int ret = rockchip_dram_init_banksize();
> @@ -507,11 +517,3 @@ int dram_init(void)
>
>         return 0;
>  }
> -
> -phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
> -{
> -       /* Make sure U-Boot only uses the space below the 4G address
> boundary */
> -       u64 top = min_t(u64, CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE, SZ_4G);
> -
> -       return (gd->ram_top > top) ? top : gd->ram_top;
> -}
> --
> 2.54.0
>
>