[PATCH v2 1/3] rockchip: rk3568: make the WDT trigger a first global reset

Jonas Karlman jonas at kwiboo.se
Mon Jun 29 19:25:16 CEST 2026


Hi Andreas,

On 6/29/2026 7:05 PM, Andreas Zdziarstek wrote:
> Default is a second global reset which causes a system hang on a timeout
> in U-Boot.
> 
> Access the register through the rk3568_cru struct to match how PX30 does
> it in arch_cpu_init().
> 
> Verified on the Hardkernel ODROID-M1S (RK3566): a watchdog timeout now
> cleanly reboots the board.
> 
> Signed-off-by: Andreas Zdziarstek <andreas.zdziarstek at gmail.com>
> ---
>  arch/arm/mach-rockchip/rk3568/rk3568.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
> index 2b1eafee37c..87bd443e9c4 100644
> --- a/arch/arm/mach-rockchip/rk3568/rk3568.c
> +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
> @@ -9,6 +9,7 @@
>  #include <misc.h>
>  #include <asm/armv8/mmu.h>
>  #include <asm/arch-rockchip/bootrom.h>
> +#include <asm/arch-rockchip/cru_rk3568.h>
>  #include <asm/arch-rockchip/grf_rk3568.h>
>  #include <asm/arch-rockchip/hardware.h>
>  #include <dt-bindings/clock/rk3568-cru.h>
> @@ -37,6 +38,9 @@
>  #define CPU_GRF_BASE		0xfdc30000
>  #define GRF_CORE_PVTPLL_CON0	(0x10)
>  
> +#define CRU_BASE		0xfdd20000
> +#define WDT_GLB_SRST_CTRL	BIT(1)
> +
>  /* PMU_GRF_GPIO0D_IOMUX_L */
>  enum {
>  	GPIO0D1_SHIFT		= 4,
> @@ -116,6 +120,8 @@ void board_debug_uart_init(void)
>  
>  int arch_cpu_init(void)
>  {
> +	static struct rk3568_cru * const cru = (void *)CRU_BASE;
> +
>  #ifdef CONFIG_XPL_BUILD
>  	/*
>  	 * When perform idle operation, corresponding clock can
> @@ -146,6 +152,10 @@ int arch_cpu_init(void)
>  	writel((PMU_PD_VO_DWN_ENA << 16),
>  	       PMU_BASE_ADDR + PMU_PWR_GATE_SFTCON);
>  #endif
> +
> +	/* Make WDT trigger a first global reset */
> +	setbits_le32(&cru->glb_rst_con, WDT_GLB_SRST_CTRL);

As mentioned in v1, please keep this inside XPL_BUILD.

SPL+U-Boot proper combined should be seen as a single firmware, we do
not consider vendor SPL + mainline U-Boot proper a supported combo.

If you also want to configure this in U-Boot proper, maybe probe of WDT
or CRU driver is a better fit?

arch_cpu_init() is mainly for one-off configuration that is needed very
early or otherwise does not really fit anywhere in the lazy loading of
driver model.

Regards,
Jonas

> +
>  	return 0;
>  }
>  



More information about the U-Boot mailing list