[PATCH 5/8] arm: socfpga: rsu: Add multiflash support

[dinesh.maniyam at altera.com]

From: Dinesh Maniyam <dinesh.maniyam at altera.com>

Add the SOCFPGA_RSU_MULTIFLASH option to let the QSPI low-level RSU
backend span the sub-partition layout across more than one SPI flash
device. When enabled, rsu_ll_qspi_init() queries the Secure Device
Manager via the QSPI get-device-info mailbox command to discover the
number and size of attached flash devices and probes each enabled
chip select; otherwise it falls back to the single-flash path.

Add the QSPI_GET_DEVICE_INFO_RESP_LEN definition used by the device
info decode, and rename the integer power helper from the libm-clashing
pow() to rsu_pow() since it is RSU-internal and only consumed by the
multiflash flash-size calculation.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam at altera.com>
---
 arch/arm/mach-socfpga/Kconfig                    | 10 ++++++++++
 arch/arm/mach-socfpga/include/mach/mailbox_s10.h |  3 +++
 arch/arm/mach-socfpga/include/mach/rsu_misc.h    |  2 +-
 arch/arm/mach-socfpga/rsu_ll_qspi.c              |  2 +-
 arch/arm/mach-socfpga/rsu_misc.c                 |  6 +++---
 5 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index ff961e7f13c..e9d675344f7 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -18,6 +18,16 @@ config SOCFPGA_RSU_SF_CS
 	  loads u-boot.itb from). Override only when RSU metadata lives
 	  on a different chip select than the u-boot.itb boot image.
 
+config SOCFPGA_RSU_MULTIFLASH
+	bool "Enable RSU multiflash support"
+	depends on CMD_SOCFPGA_RSU
+	help
+	  Allow the RSU flow to operate across multiple SPI flash devices.
+	  When enabled, the QSPI low-level backend queries the Secure Device
+	  Manager for the number and size of the attached flash devices and
+	  spans the RSU sub-partition layout across all of them. Leave
+	  disabled for the common single-flash layout.
+
 config SOCFPGA_SECURE_VAB_AUTH
 	bool "Enable boot image authentication with Secure Device Manager"
 	depends on ARCH_SOCFPGA_AGILEX || ARCH_SOCFPGA_N5X || \
diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
index 5cb6ae4bcaf..ead9e510bac 100644
--- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
@@ -136,6 +136,9 @@ enum ALT_SDM_MBOX_RESP_CODE {
 #define MBOX_HPS_STAGE_NOTIFY		93
 #define MBOX_QSPI_GET_DEVICE_INFO	116 /* get QSPI size and erasesize */
 
+/* Response length (in words) of the QSPI get-device-info command */
+#define QSPI_GET_DEVICE_INFO_RESP_LEN	8
+
 /* Mailbox registers */
 #define MBOX_CIN			0	/* command valid offset */
 #define MBOX_ROUT			4	/* response output offset */
diff --git a/arch/arm/mach-socfpga/include/mach/rsu_misc.h b/arch/arm/mach-socfpga/include/mach/rsu_misc.h
index 7777d652912..6d2c8f90367 100644
--- a/arch/arm/mach-socfpga/include/mach/rsu_misc.h
+++ b/arch/arm/mach-socfpga/include/mach/rsu_misc.h
@@ -61,5 +61,5 @@ void rsu_log(const enum rsu_log_level level, const char *format, ...);
 int smc_store_max_retry(u32 value);
 
 void swap_bits(char *data, int size);
-int pow(u32 x, u32 y);
+int rsu_pow(u32 x, u32 y);
 #endif
diff --git a/arch/arm/mach-socfpga/rsu_ll_qspi.c b/arch/arm/mach-socfpga/rsu_ll_qspi.c
index 423df4dd676..11bd80a6eca 100644
--- a/arch/arm/mach-socfpga/rsu_ll_qspi.c
+++ b/arch/arm/mach-socfpga/rsu_ll_qspi.c
@@ -2258,7 +2258,7 @@ int get_num_flash(u32 *flash_enabled)
 		if (mbox_flash_info[i].size > SZ_2G) {
 			/* >2Gb, power the bit 0-30 */
 			debug("RSU: QSPI %d larger than 2Gbits capacity.", i);
-			flash_enabled[i] = pow(2, mbox_flash_info[i].size & GENMASK(30, 0));
+			flash_enabled[i] = rsu_pow(2, mbox_flash_info[i].size & GENMASK(30, 0));
 			flash_enabled[i] = flash_enabled[i] / SZ_8;
 		} else {
 			/* <= 2Gb, total the bit 0-30 */
diff --git a/arch/arm/mach-socfpga/rsu_misc.c b/arch/arm/mach-socfpga/rsu_misc.c
index 50a744d162e..6d34d0d2632 100644
--- a/arch/arm/mach-socfpga/rsu_misc.c
+++ b/arch/arm/mach-socfpga/rsu_misc.c
@@ -135,14 +135,14 @@ void swap_bits(char *data, int len)
 	}
 }
 
-int pow(u32 x, u32 y)
+int rsu_pow(u32 x, u32 y)
 {
 	if (y == 0)
 		return 1;
 	else if ((y % 2) == 0)
-		return pow(x, y / 2) * pow(x, y / 2);
+		return rsu_pow(x, y / 2) * rsu_pow(x, y / 2);
 	else
-		return x * pow(x, y / 2) * pow(x, y / 2);
+		return x * rsu_pow(x, y / 2) * rsu_pow(x, y / 2);
 }
 
 /**
-- 
2.43.7