[PATCH 7/8] arm: dts: socfpga: rsu: Anchor RSU DM node across SoC64 families

[dinesh.maniyam at altera.com]

From: Dinesh Maniyam <dinesh.maniyam at altera.com>

The RSU driver-model anchor ("altr,socfpga-rsu") is consumed only by the
U-Boot-proper console command, never by SPL. It was previously present
only for Agilex, via the socfpga-rsu node under soc at 0 in
socfpga_soc64_u-boot.dtsi.

The other SoC64 families assemble their devicetree under a "soc" node and
pull in only the FIT image overlay (socfpga_soc64_fit-u-boot.dtsi), which
carries no SoC nodes, so the anchor never reached them. With
CONFIG_SOCFPGA_RSU_DM=y that left rsu_init() returning -ENODEV on Agilex5,
Stratix10 and N5X even though the RSU command is enabled there.

Add the anchor node to the Agilex5, N5X and Stratix10 U-Boot devicetree
overlays, and drop bootph-all from the Agilex node so the anchor is not
carried into the pre-relocation/SPL devicetree; it is only needed by the
proper-only console command.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam at altera.com>
---
 arch/arm/dts/socfpga_agilex5-u-boot.dtsi         | 4 ++++
 arch/arm/dts/socfpga_n5x-u-boot.dtsi             | 4 ++++
 arch/arm/dts/socfpga_soc64_u-boot.dtsi           | 1 -
 arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 4 ++++
 4 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
index 0f0f457de54..90f36d42923 100644
--- a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
@@ -18,6 +18,10 @@
 	soc {
 		bootph-all;
 
+		socfpga-rsu {
+			compatible = "altr,socfpga-rsu";
+		};
+
 		socfpga_ccu_config: socfpga-ccu-config {
 			compatible = "intel,socfpga-dtreg";
 			#address-cells = <1>;
diff --git a/arch/arm/dts/socfpga_n5x-u-boot.dtsi b/arch/arm/dts/socfpga_n5x-u-boot.dtsi
index e27a64651e1..0b38d1e8f70 100644
--- a/arch/arm/dts/socfpga_n5x-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_n5x-u-boot.dtsi
@@ -18,6 +18,10 @@
 	soc {
 		bootph-all;
 
+		socfpga-rsu {
+			compatible = "altr,socfpga-rsu";
+		};
+
 		ccu: cache-controller at f7000000 {
 			compatible = "arteris,ncore-ccu";
 			reg = <0xf7000000 0x100900>;
diff --git a/arch/arm/dts/socfpga_soc64_u-boot.dtsi b/arch/arm/dts/socfpga_soc64_u-boot.dtsi
index 5ec3c0662e3..91b4fe28624 100644
--- a/arch/arm/dts/socfpga_soc64_u-boot.dtsi
+++ b/arch/arm/dts/socfpga_soc64_u-boot.dtsi
@@ -9,7 +9,6 @@
 	soc at 0 {
 		socfpga-rsu {
 			compatible = "altr,socfpga-rsu";
-			bootph-all;
 		};
 
 		socfpga-system-mgr-firewall {
diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
index ef0df769762..701433cbc35 100644
--- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi
@@ -14,6 +14,10 @@
 	};
 
 	soc {
+		socfpga-rsu {
+			compatible = "altr,socfpga-rsu";
+		};
+
 		freeze_controller: freeze_controller at f9000450 {
 			compatible = "altr,freeze-bridge-controller";
 			reg = <0xf9000450 0x00000010>;
-- 
2.43.7