[PATCH 1/2] mtd: nand: raw: Kconfig: clean up SPL Cadence NAND dependencies

[dinesh.maniyam at altera.com]

From: Dinesh Maniyam <dinesh.maniyam at altera.com>

Fix and align Kconfig dependencies for Cadence NAND in SPL.
Move SPL-specific selects to SPL_NAND_CADENCE and remove them from the
non-SPL NAND_CADENCE option. This avoids incorrect symbol selection and
keeps SPL Cadence NAND support self-contained.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam at altera.com>
---
 drivers/mtd/nand/raw/Kconfig | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 306175873fa..d3467876265 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -202,12 +202,6 @@ config NAND_CADENCE
 	depends on OF_CONTROL && DM_MTD && ARCH_SOCFPGA
 	select DEVRES
 	select SYS_NAND_SELF_INIT
-	select SPL_SYS_NAND_SELF_INIT
-	select SPL_NAND_BASE
-	select SPL_NAND_DRIVERS
-	select SPL_NAND_IDENT
-	select SPL_NAND_INIT
-	select SPL_NAND_ECC
 	imply CMD_NAND
 	help
 	  Enable the driver for NAND flash on platforms using a Cadence NAND
@@ -677,7 +671,7 @@ config SYS_NAND_PAGE_SIZE
 		SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
 		MVEBU_SPL_BOOT_DEVICE_NAND || \
 		(NAND_ATMEL && SPL_NAND_SUPPORT) || \
-		SPL_GENERATE_ATMEL_PMECC_HEADER || NAND_SANDBOX || NAND_CADENCE
+		SPL_GENERATE_ATMEL_PMECC_HEADER || NAND_SANDBOX || SPL_NAND_CADENCE
 	help
 	  Number of data bytes in one page for the NAND chip on the
 	  board, not including the OOB area.
@@ -780,6 +774,12 @@ config SPL_NAND_AM33XX_BCH
 config SPL_NAND_CADENCE
 	bool "Support Cadence NAND controller for SPL"
 	depends on SPL_NAND_SUPPORT
+	select SPL_SYS_NAND_SELF_INIT
+	select SPL_NAND_BASE
+	select SPL_NAND_DRIVERS
+	select SPL_NAND_IDENT
+	select SPL_NAND_INIT
+	select SPL_NAND_ECC
 	help
 	  This is a small implementation of the Cadence NAND controller
 	  for use on SPL.
-- 
2.19.0