[PATCH v2] spi: cadence_qspi: pulse controller reset at probe

[Michal Simek]

On 2/15/26 16:16, Padmarao Begari wrote:
> The driver previously only deasserted the optional bulk reset,
> leaving the controller in whatever state earlier stages left it and
> risking failed probes or bad transfers. Assert the reset first, wait
> 10 µs, and then deassert so the OSPI block starts from a known state.
> 
> Signed-off-by: Padmarao Begari <padmarao.begari at amd.com>
> ---
> Changes in v2:
> -Remove the reset condition based on CONFIG_ZYNQMP_FIRMWARE
> -Use reset bulk option
> -Add assert and delay for reset
> -Update commit message and subject
> ---
>   drivers/spi/cadence_qspi.c | 20 ++++++++++++++++++--
>   1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index d1404e13810..2a4a49c5f1c 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -13,6 +13,7 @@
>   #include <spi.h>
>   #include <spi-mem.h>
>   #include <dm/device_compat.h>
> +#include <linux/delay.h>
>   #include <linux/err.h>
>   #include <linux/errno.h>
>   #include <linux/io.h>
> @@ -254,8 +255,23 @@ static int cadence_spi_probe(struct udevice *bus)
>   	}
>   
>   	priv->resets = devm_reset_bulk_get_optional(bus);
> -	if (priv->resets)
> -		reset_deassert_bulk(priv->resets);
> +	if (priv->resets) {
> +		/* Assert all OSPI reset lines */
> +		ret = reset_assert_bulk(priv->resets);
> +		if (ret) {
> +			dev_err(bus, "Failed to assert OSPI reset: %d\n", ret);
> +			return ret;
> +		}
> +
> +		udelay(10);
> +
> +		/* Deassert all OSPI reset lines */
> +		ret = reset_deassert_bulk(priv->resets);
> +		if (ret) {
> +			dev_err(bus, "Failed to deassert OSPI reset: %d\n", ret);
> +			return ret;
> +		}
> +	}
>   
>   	if (!priv->qspi_is_init) {
>   		cadence_qspi_apb_controller_init(priv);

applied.
M