[PATCH v2] phy: rockchip: naneng-combphy: Enable U3 port for USB3OTG on RK3568

[Kever Yang]

On 2026/1/7 07:36, Jonas Karlman wrote:
> The USB OTG U3 port may have been disabled early, add support to the
> COMBPHY driver to re-enable the U3 port.
>
> This matches changes made in the Linux commit 7bb14b61b7d0 ("phy:
> rockchip: naneng-combphy: Enable U3 OTG port for RK3568").
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2: No change, drop second patch
> ---
>   drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> index d602f965d6aa..82353ae7678c 100644
> --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> @@ -399,6 +399,14 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
>   		param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
>   		param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);
>   		param_write(priv->phy_grf, &cfg->usb_mode_set, true);
> +		switch (priv->id) {
> +		case 0:
> +			param_write(priv->pipe_grf, &cfg->u3otg0_port_en, true);
> +			break;
> +		case 1:
> +			param_write(priv->pipe_grf, &cfg->u3otg1_port_en, true);
> +			break;
> +		}
>   		break;
>   	case PHY_TYPE_SATA:
>   		writel(0x41, priv->mmio + 0x38);