[PATCH] mtd: spi-nor: Add gd25lx128j chip
Flaviu Nistor
flaviu.nistor at gmail.com
Sun Mar 8 20:23:49 CET 2026
Hi Takahiro,
>Hi,
>
>> Add gd25lx128j GIGADEVICE chip to spi-nor id table.
>>=20
>> Signed-off-by: Flaviu Nistor <flaviu.nistor at gmail.com>
>> ---
>> drivers/mtd/spi/spi-nor-ids.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>=20
>> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.=
>c
>> index 3bcb0d7b7ba..b79cbcb2858 100644
>> --- a/drivers/mtd/spi/spi-nor-ids.c
>> +++ b/drivers/mtd/spi/spi-nor-ids.c
>> @@ -202,6 +202,8 @@ const struct flash_info spi_nor_ids[] =3D {
>> SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
>> {INFO("gd55lt02g", 0xc8661C, 0, 64 * 1024, 4096, SECT_4K |
>> SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
>> + {INFO("gd25lx128j", 0xc86818, 0, 64 * 1024, 256, SECT_4K |
>> + SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
>
>This device is 128Mb (16MB) that doesn't require 4-byte addressing.
>Is 'SPI_NOR_4B_OPCODES' really needed?
>
SPI_NOR_4B_OPCODES is supported and it works but indeed it is not mandatory.
Thanks for pointing this out. I will send a v2.
>> {
>> INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512,
>> SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)
>> --
>> 2.43.0
>
>Thanks,
>Takahiro
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