[PATCH] arm: socfpga: Enable MMC secure transaction in SPL.

[dinesh.maniyam at altera.com]

From: Dinesh Maniyam <dinesh.maniyam at altera.com>

Program SECURE_TRANS_REG when CONFIG_SPL_MMC is enabled
to allow ATF loaded from MMC to access the secure DDR region.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam at altera.com>
---
 arch/arm/mach-socfpga/spl_agilex5.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/mach-socfpga/spl_agilex5.c b/arch/arm/mach-socfpga/spl_agilex5.c
index 1be347360f5..d0c2af795de 100644
--- a/arch/arm/mach-socfpga/spl_agilex5.c
+++ b/arch/arm/mach-socfpga/spl_agilex5.c
@@ -110,6 +110,14 @@ void board_init_f(ulong dummy)
 		}
 	}
 
+	/*
+	 * Set secure transaction for mmc, so ATF image from mmc can be loaded
+	 * to secure region reserved for ATF in DDR.
+	 */
+	if (IS_ENABLED(CONFIG_SPL_MMC))
+		writel(SECURE_TRANS_SET, SECURE_TRANS_REG);
+	}
+
 	if (IS_ENABLED(CONFIG_CADENCE_QSPI))
 		mbox_qspi_open();
 
-- 
2.43.7