[PATCH 12/13] board: tqma6: use runtime SoC detection in enet setup

[Max Merchel]

Am 12.03.26 um 10:57 schrieb Max Merchel:
> Select the appropriate settings based on the CPU type during
> Ethernet configuration.
>
> Signed-off-by: Paul Gerber <Paul.Gerber at ew.tq-group.com>
> Signed-off-by: Max Merchel <Max.Merchel at ew.tq-group.com>
> ---

Drop this Patch.

The values ​​can be read from the device trees, and therefore the
changes will be removed in the following series

Max

>   board/tq/tqma6/tqma6_mba6.c | 124 ++++++++++++++++++++----------------
>   1 file changed, 69 insertions(+), 55 deletions(-)
>
> diff --git a/board/tq/tqma6/tqma6_mba6.c b/board/tq/tqma6/tqma6_mba6.c
> index 32aeb1b07c8..f1b9dc8d372 100644
> --- a/board/tq/tqma6/tqma6_mba6.c
> +++ b/board/tq/tqma6/tqma6_mba6.c
> @@ -33,21 +33,21 @@
>   
>   #include "../common/tq_bb.h"
>   
> -#if defined(CONFIG_TQMA6Q)
> +#define TQMA6Q_IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	0x02e0790
> +#define TQMA6Q_IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM		0x02e07ac
>   
> -#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	0x02e0790
> -#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM	0x02e07ac
> +#define TQMA6DL_IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	0x02e0768
> +#define TQMA6DL_IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM	0x02e0788
>   
> -#elif defined(CONFIG_TQMA6S) || defined(CONFIG_TQMA6DL)
> +#define TQMA6Q_MBA6X_KSZ9031_CTRL_SKEW	0x0032
> +#define TQMA6Q_MBA6X_KSZ9031_CLK_SKEW	0x03ff
> +#define TQMA6Q_MBA6X_KSZ9031_RX_SKEW	0x3333
> +#define TQMA6Q_MBA6X_KSZ9031_TX_SKEW	0x2036
>   
> -#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII	0x02e0768
> -#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM	0x02e0788
> -
> -#else
> -
> -#error "need to select module"
> -
> -#endif
> +#define TQMA6DL_MBA6X_KSZ9031_CTRL_SKEW	0x0030
> +#define TQMA6DL_MBA6X_KSZ9031_CLK_SKEW	0x03ff
> +#define TQMA6DL_MBA6X_KSZ9031_RX_SKEW	0x3333
> +#define TQMA6DL_MBA6X_KSZ9031_TX_SKEW	0x2052
>   
>   /* disable on die termination for RGMII */
>   #define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE	0x00000000
> @@ -63,10 +63,17 @@ static void mba6_setup_iomuxc_enet(void)
>   	/* clear gpr1[ENET_CLK_SEL] for externel clock */
>   	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK);
>   
> -	__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
> -		     (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
> -	__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
> -		     (void *)IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII);
> +	if (is_mx6sdl()) {
> +		__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
> +			     (void *)TQMA6DL_IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
> +		__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
> +			     (void *)TQMA6DL_IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII);
> +	} else if (is_mx6dq()) {
> +		__raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE,
> +			     (void *)TQMA6Q_IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
> +		__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
> +			     (void *)TQMA6Q_IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII);
> +	}
>   }
>   
>   int board_mmc_get_env_dev(int devno)
> @@ -81,45 +88,52 @@ int board_mmc_get_env_dev(int devno)
>   
>   int board_phy_config(struct phy_device *phydev)
>   {
> -/*
> - * optimized pad skew values depends on CPU variant on the TQMa6x module:
> - * CONFIG_TQMA6Q: i.MX6Q/D
> - * CONFIG_TQMA6S: i.MX6S
> - * CONFIG_TQMA6DL: i.MX6DL
> - */
> -#if defined(CONFIG_TQMA6Q)
> -#define MBA6X_KSZ9031_CTRL_SKEW	0x0032
> -#define MBA6X_KSZ9031_CLK_SKEW	0x03ff
> -#define MBA6X_KSZ9031_RX_SKEW	0x3333
> -#define MBA6X_KSZ9031_TX_SKEW	0x2036
> -#elif defined(CONFIG_TQMA6S) || defined(CONFIG_TQMA6DL)
> -#define MBA6X_KSZ9031_CTRL_SKEW	0x0030
> -#define MBA6X_KSZ9031_CLK_SKEW	0x03ff
> -#define MBA6X_KSZ9031_RX_SKEW	0x3333
> -#define MBA6X_KSZ9031_TX_SKEW	0x2052
> -#else
> -#error
> -#endif
> -	/* min rx/tx ctrl delay */
> -	ksz9031_phy_extended_write(phydev, 2,
> -				   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
> -				   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> -				   MBA6X_KSZ9031_CTRL_SKEW);
> -	/* min rx delay */
> -	ksz9031_phy_extended_write(phydev, 2,
> -				   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
> -				   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> -				   MBA6X_KSZ9031_RX_SKEW);
> -	/* max tx delay */
> -	ksz9031_phy_extended_write(phydev, 2,
> -				   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
> -				   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> -				   MBA6X_KSZ9031_TX_SKEW);
> -	/* rx/tx clk skew */
> -	ksz9031_phy_extended_write(phydev, 2,
> -				   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
> -				   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> -				   MBA6X_KSZ9031_CLK_SKEW);
> +	/*
> +	 * optimized pad skew values depends on CPU variant on the TQMa6x module:
> +	 */
> +	if (is_mx6sdl()) {
> +		/* min rx/tx ctrl delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6DL_MBA6X_KSZ9031_CTRL_SKEW);
> +		/* min rx delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6DL_MBA6X_KSZ9031_RX_SKEW);
> +		/* max tx delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6DL_MBA6X_KSZ9031_TX_SKEW);
> +		/* rx/tx clk skew */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6DL_MBA6X_KSZ9031_CLK_SKEW);
> +	} else if (is_mx6dq()) {
> +		/* min rx/tx ctrl delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6Q_MBA6X_KSZ9031_CTRL_SKEW);
> +		/* min rx delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6Q_MBA6X_KSZ9031_RX_SKEW);
> +		/* max tx delay */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6Q_MBA6X_KSZ9031_TX_SKEW);
> +		/* rx/tx clk skew */
> +		ksz9031_phy_extended_write(phydev, 2,
> +					   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
> +					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
> +					   TQMA6Q_MBA6X_KSZ9031_CLK_SKEW);
> +	}
>   
>   	phydev->drv->config(phydev);
>   

-- 
Best regards,
Max

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Amtsgericht München, HRB 105018
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