[PATCH] clk: rk3288: add stub for ops->enable

[Marius Dinu]

This fixes a bug where the watchdog can't enable the clock.
AFAIK, this clock is always enabled.

Tested on Asus TinkerBoard. Test results:
wdt dev         => works
wdt start 200   => works, but timeout is 43s
wdt start 10000 => works, but timeout is 1m27s
wdt reset       => works
wdt stop        => doesn't work

Signed-off-by: Marius Dinu <m95d+git at psihoexpert.ro>
---
 drivers/clk/rockchip/clk_rk3288.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index a4ff1c41abb..9cc883662ff 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -745,6 +745,10 @@ static ulong rockchip_saradc_set_clk(struct rockchip_cru *cru, uint hz)
 	return rockchip_saradc_get_clk(cru);
 }
 
+static int rk3288_clk_enable(struct clk *clk){
+	return 0;
+}
+
 static ulong rk3288_clk_get_rate(struct clk *clk)
 {
 	struct rk3288_clk_priv *priv = dev_get_priv(clk->dev);
@@ -947,6 +951,7 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par
 }
 
 static struct clk_ops rk3288_clk_ops = {
+	.enable		= rk3288_clk_enable,
 	.get_rate	= rk3288_clk_get_rate,
 	.set_rate	= rk3288_clk_set_rate,
 #if CONFIG_IS_ENABLED(OF_REAL)
-- 
2.52.0