[PATCH v5 00/10] Add PCIe Boot support for TI J784S4 SoC

[Tom Rini]

On Mon, 16 Feb 2026 15:58:28 +0530, Siddharth Vadapalli wrote:

> This series adds PCIe endpoint boot support for the TI J784S4 SoC.
> Series is based on commit
> f9ffeec4bdc board: toradex: Make A53 get RAM size from DT in K3 boards
> of the master branch of U-Boot.
> 
> v4 of this series is at:
> https://patchwork.ozlabs.org/project/uboot/cover/20251201110103.845413-1-h-salunke@ti.com/
> Changes since v4:
> - Addressed Udit's feedback:
>   i) Patch 6 has been updated by limiting changes to disabling CONFIG_SPL_PCI_ENDPOINT
>      and CONFIG_SPL_PHY (CONFIG_PCIE_CDNS_TI_EP, CONFIG_SPL_PHY_CADENCE_TORRENT and
>      CONFIG_SPL_PHY_J721E_WIZ don't need to be disabled as pointed out by Udit).
>   ii) Commit message of patch 8 has been updated to indicate that although PCIe Boot
>       is supported in Hardware for J742S2 SoC, it is not yet enabled in Software.
>   iii) Documentation in patch 10 has been updated with complete set of device-tree
>        changes included and the C Program to transfer bootloaders has also been
>        simplified and documented with the usage of appropriate variable names.
> 
> [...]

Applied to u-boot/next, thanks!

[01/10] arm: mach-k3: j784s4: Update SoC autogen data to enable PCIe boot
        commit: 0d5ddcc50b2900ddcbb32685525ad8ab60c696e8
[02/10] phy: cadence: Add config to enable Cadence Torrent PHY at SPL stage
        commit: 2a21f48771a2f4f0f05d9c76517212ffb94f3c35
[03/10] phy: ti: Add config to enable J721E WIZ SERDES wrapper at SPL stage
        commit: 35e1083fb930ba1fa3a3c5cd139bf8285043c191
[04/10] configs: j784s4_evm_r5_defconfig: Enable configs for PCIe boot
        commit: d83eefab8cfd58b8e4259734b2e19b30a8659461
[05/10] configs: j784s4_evm_a72_defconfig: Enable configs for PCIe boot
        commit: 3c28bf7719130158c2acd86c45df95262b6b8fa1
[06/10] configs: am69_sk_r5_defconfig: Disable PCIe boot configs
        commit: 014d9c5ac348cd7d11aa991df466b47428487c86
[07/10] configs: am69_sk_a72_defconfig: Disable PCIe boot configs
        commit: af3800c83dc216e8d3e951cfced7c7c27ee88530
[08/10] configs: j742s2_evm_r5_defconfig: Disable PCIe boot configs
        commit: 2abd957503eb423cc30535e6e20c2b113653f5a3
[09/10] configs: j742s2_evm_a72_defconfig: Disable PCIe boot configs
        commit: 078200f1ee1857d5a1be0c53313e9e4e6ce2a4a3
[10/10] docs: board: ti: j784s4_evm: Add PCIe boot documentation
        commit: 6230a595a733e381ecdbe35199d255f3d5801955
-- 
Tom