[PATCH] serial: pl011: Remove legacy serial driver options

[Tom Rini]

There are no longer any users of the legacy non-DM pl01x serial driver.
This lets us remove both CONFIG_PL011_SERIAL as well as
CONFIG_PL011_SERIAL_RLCR references. We still have SPL users of the
non-DM portions of the code.

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 drivers/serial/Kconfig                 | 8 +-------
 drivers/serial/Makefile                | 1 -
 drivers/serial/serial_pl01x_internal.h | 4 ----
 3 files changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b84cb9ec781d..c86c883e0cbb 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -398,7 +398,7 @@ config DEBUG_UART_PL010
 
 config DEBUG_UART_PL011
 	bool "pl011"
-	depends on PL01X_SERIAL || PL011_SERIAL
+	depends on PL01X_SERIAL
 	help
 	  Select this to enable a debug UART using the pl01x driver with the
 	  PL011 UART type. You will need to provide parameters to make this
@@ -862,12 +862,6 @@ config INTEL_MID_SERIAL
 	  Select this to enable a UART for Intel MID platforms.
 	  This uses the ns16550 driver as a library.
 
-config PL011_SERIAL
-	bool "ARM PL011 driver"
-	depends on !DM_SERIAL
-	help
-	  Select this to enable a UART for platforms using PL011.
-
 config PL01X_SERIAL
 	bool "ARM PL010 and PL011 driver"
 	depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index fe8d23be5123..66088b44eb68 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -10,7 +10,6 @@ obj-y += serial.o
 endif
 
 obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o
-obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
 obj-$(CONFIG_$(PHASE_)SYS_NS16550_SERIAL) += serial_ns16550.o
 
 obj-$(CONFIG_ALTERA_UART) += altera_uart.o
diff --git a/drivers/serial/serial_pl01x_internal.h b/drivers/serial/serial_pl01x_internal.h
index 7ae3ae509086..3c481b1e3d13 100644
--- a/drivers/serial/serial_pl01x_internal.h
+++ b/drivers/serial/serial_pl01x_internal.h
@@ -26,11 +26,7 @@ struct pl01x_regs {
 	u32	pl010_lcrl;	/* 0x10 Line control register, low byte */
 	u32	pl010_cr;	/* 0x14 Control register */
 	u32	fr;		/* 0x18 Flag register (Read only) */
-#ifdef CONFIG_PL011_SERIAL_RLCR
-	u32	pl011_rlcr;	/* 0x1c Receive line control register */
-#else
 	u32	reserved;
-#endif
 	u32	ilpr;		/* 0x20 IrDA low-power counter register */
 	u32	pl011_ibrd;	/* 0x24 Integer baud rate register */
 	u32	pl011_fbrd;	/* 0x28 Fractional baud rate register */
-- 
2.43.0