[RFC PATCH 15/15] power: pmic: raa215300: Convert sysreset to uclass adjunct
Simon Glass
sjg at chromium.org
Thu Mar 19 22:35:45 CET 2026
Convert the RAA215300 PMIC's sysreset support from the child-device
pattern to use uclass adjuncts. Previously the PMIC driver's bind
function created a separate child device with a dedicated sysreset
driver. Now the PMIC driver registers itself as a sysreset adjunct
during probe, keeping all the functionality in a single device.
The key change is that raa215300_sysreset_request() no longer needs
dev_get_parent() to reach the PMIC, since the device itself is the
PMIC.
Remove the now-unused sysreset_raa215300.c driver.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
drivers/power/pmic/raa215300.c | 60 ++++++++++++++++++++++-----
drivers/sysreset/Kconfig | 3 ++
drivers/sysreset/Makefile | 1 -
drivers/sysreset/sysreset_raa215300.c | 58 --------------------------
4 files changed, 52 insertions(+), 70 deletions(-)
delete mode 100644 drivers/sysreset/sysreset_raa215300.c
diff --git a/drivers/power/pmic/raa215300.c b/drivers/power/pmic/raa215300.c
index a581a1f6dc1..279dbd29756 100644
--- a/drivers/power/pmic/raa215300.c
+++ b/drivers/power/pmic/raa215300.c
@@ -5,11 +5,14 @@
#include <dm.h>
#include <dm/device-internal.h>
-#include <dm/lists.h>
#include <i2c.h>
#include <power/pmic.h>
+#include <sysreset.h>
-#define RAA215300_REG_COUNT 0x80
+#define RAA215300_REG_COUNT 0x80
+#define RAA215300_REG_SWRESET 0x6D
+#define RAA215300_COLD_RESET BIT(0)
+#define RAA215300_WARM_RESET BIT(1)
static int raa215300_reg_count(struct udevice *dev)
{
@@ -27,24 +30,59 @@ static const struct udevice_id raa215300_ids[] = {
{ /* sentinel */ }
};
-static int raa215300_bind(struct udevice *dev)
+#if IS_ENABLED(CONFIG_SYSRESET_RAA215300)
+static int raa215300_sysreset_request(struct udevice *dev,
+ enum sysreset_t type)
{
- if (IS_ENABLED(CONFIG_SYSRESET_RAA215300)) {
- struct driver *drv = lists_driver_lookup_name("raa215300_sysreset");
- if (!drv)
- return -ENOENT;
+ int ret;
+ u8 val;
- return device_bind(dev, drv, dev->name, NULL, dev_ofnode(dev),
- NULL);
+ /*
+ * The RAA215300 documentation names the available reset types
+ * differently to U-Boot:
+ *
+ * - A "warm" reset via the RAA215300 PMIC will fully reset the SoC
+ * (CPU & GPIOs), so this corresponds to SYSRESET_COLD.
+ *
+ * - A "cold" reset via the RAA215300 PMIC will cycle all power supply
+ * rails, so this corresponds to SYSRESET_POWER.
+ */
+ switch (type) {
+ case SYSRESET_COLD:
+ val = RAA215300_WARM_RESET;
+ break;
+
+ case SYSRESET_POWER:
+ val = RAA215300_COLD_RESET;
+ break;
+
+ default:
+ return -EPROTONOSUPPORT;
}
- return 0;
+ ret = pmic_reg_write(dev, RAA215300_REG_SWRESET, val);
+ if (ret)
+ return ret;
+
+ return -EINPROGRESS;
}
+static struct sysreset_ops raa215300_sysreset_ops = {
+ .request = raa215300_sysreset_request,
+};
+
+static const struct driver_adjunct raa215300_adjuncts[] = {
+ { UCLASS_SYSRESET, &raa215300_sysreset_ops },
+ { }
+};
+#endif
+
U_BOOT_DRIVER(raa215300_pmic) = {
.name = "raa215300_pmic",
.id = UCLASS_PMIC,
.of_match = raa215300_ids,
- .bind = raa215300_bind,
.ops = &raa215300_ops,
+#if IS_ENABLED(CONFIG_SYSRESET_RAA215300)
+ .adjuncts = raa215300_adjuncts,
+#endif
};
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 16ef434a8d9..737327b8197 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -290,8 +290,11 @@ config SYSRESET_MPC83XX
config SYSRESET_RAA215300
bool "Support sysreset via Renesas RAA215300 PMIC"
depends on PMIC_RAA215300
+ select DM_UC_ADJUNCT
help
Add support for the system reboot via the Renesas RAA215300 PMIC.
+ Uses the uclass adjunct feature to register the PMIC as a
+ sysreset device without creating a separate child device.
config SYSRESET_QCOM_PSHOLD
bool "Support sysreset for Qualcomm SoCs via PSHOLD"
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index d18a5d52360..0226eecca4d 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(PHASE_)SYSRESET_AT91) += sysreset_at91.o
obj-$(CONFIG_$(PHASE_)SYSRESET_X86) += sysreset_x86.o
-obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
obj-$(CONFIG_SYSRESET_QCOM_PSHOLD) += sysreset_qcom-pshold.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
obj-$(CONFIG_SYSRESET_QEMU_VIRT_CTRL) += sysreset_qemu_virt_ctrl.o
diff --git a/drivers/sysreset/sysreset_raa215300.c b/drivers/sysreset/sysreset_raa215300.c
deleted file mode 100644
index 32dfcb0aec8..00000000000
--- a/drivers/sysreset/sysreset_raa215300.c
+++ /dev/null
@@ -1,58 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2023 Renesas Electronics Corporation
- */
-
-#include <dm.h>
-#include <power/pmic.h>
-#include <sysreset.h>
-
-#define RAA215300_REG_SWRESET 0x6D
-#define RAA215300_COLD_RESET BIT(0)
-#define RAA215300_WARM_RESET BIT(1)
-
-static int raa215300_sysreset_request(struct udevice *dev, enum sysreset_t type)
-{
- struct udevice *pmic = dev_get_parent(dev);
- int ret;
- u8 val;
-
- /*
- * The RAA215300 documentation names the available reset types
- * differently to u-boot:
- *
- * - A "warm" reset via the RAA215300 PMIC will fully reset the SoC
- * (CPU & GPIOs), so this corresponds to SYSRESET_COLD.
- *
- * - A "cold" reset via the RAA215300 PMIC will cycle all power supply
- * rails, so this corresponds to SYSRESET_POWER.
- */
- switch (type) {
- case SYSRESET_COLD:
- val = RAA215300_WARM_RESET;
- break;
-
- case SYSRESET_POWER:
- val = RAA215300_COLD_RESET;
- break;
-
- default:
- return -EPROTONOSUPPORT;
- }
-
- ret = pmic_reg_write(pmic, RAA215300_REG_SWRESET, val);
- if (ret)
- return ret;
-
- return -EINPROGRESS;
-}
-
-static struct sysreset_ops raa215300_sysreset_ops = {
- .request = raa215300_sysreset_request,
-};
-
-U_BOOT_DRIVER(raa215300_sysreset) = {
- .name = "raa215300_sysreset",
- .id = UCLASS_SYSRESET,
- .ops = &raa215300_sysreset_ops,
-};
--
2.43.0
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