[PATCH 3/3] k3-am62-pocketbeagle2: add support for 1GB variant
Randolph Sapp
rs at ti.com
Mon Mar 23 19:38:57 CET 2026
On Fri Mar 20, 2026 at 10:26 AM CDT, Robert Nelson wrote:
>> > +
>> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_FIX
>> > + bool "Set the PocketBeagle 2 RAM size instead of detecting it"
>> > + default false
>> > + help
>> > + RAM size is automatically detected through the device revision stored
>> > + in EEPROM. This overrides the detection logic with a fixed value.
>>
>> With the ability to detect the board type via the EEPROM, is there any
>> use to having this option?
>>
>> IMO we should just let the board boot with runtime detection for DDR
>> size everytime. This config option just makes the execution harder to
>> understand while providing minimal value.
>
> Phytec also does that with their boards that detect memory sizes, i
> think Randolph was trying to mirror that kconfig section..
Yeah, I specifically like the option to override the detection logic if users
have unusual hardware configs or boards that do not follow the loose
identification scheme defined in the automatic fixup path.
>>
>> > +
>> > +choice
>> > + prompt "PocketBeagle 2 RAM size"
>> > + depends on POCKETBEAGLE2_AM62X_RAM_SIZE_FIX
>> > + default POCKETBEAGLE2_AM62X_RAM_SIZE_512MB
>> > +
>> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_512MB
>> > + bool "512MB RAM"
>> > + help
>> > + Set RAM size fix to 512MB for the PocketBeagle 2.
>> > +
>> > +config POCKETBEAGLE2_AM62X_RAM_SIZE_1GB
>> > + bool "1GB RAM"
>> > + help
>> > + Set RAM size fix to 1GB for the PocketBeagle 2.
>> > +
>> > +endchoice
>> > diff --git a/board/beagle/pocketbeagle2/Makefile b/board/beagle/pocketbeagle2/Makefile
>> > index 3d42c160716..dd529fe6d75 100644
>> > --- a/board/beagle/pocketbeagle2/Makefile
>> > +++ b/board/beagle/pocketbeagle2/Makefile
>> > @@ -7,3 +7,5 @@
>> > #
>> >
>> > obj-y += pocketbeagle2.o
>> > +obj-${CONFIG_K3_DDRSS} += ../../phytec/common/k3/k3_ddrss_patch.o
>> > +obj-${CONFIG_TI_I2C_BOARD_DETECT} += ../../ti/common/board_detect.o
>> > diff --git a/board/beagle/pocketbeagle2/pocketbeagle2.c b/board/beagle/pocketbeagle2/pocketbeagle2.c
>> > index b6768caa34b..1bfc79350b6 100644
>> > --- a/board/beagle/pocketbeagle2/pocketbeagle2.c
>> > +++ b/board/beagle/pocketbeagle2/pocketbeagle2.c
>> > @@ -15,15 +15,123 @@
>> > #include <spl.h>
>> > #include <asm/arch/k3-ddr.h>
>> >
>> > +#include "../../ti/common/board_detect.h"
>> > +#include "pocketbeagle2_ddr.h"
>> > +
>> > +DECLARE_GLOBAL_DATA_PTR;
>> > +
>> > +static int pocketbeagle2_get_ddr_size(void)
>> > +{
>> > + // check config overrides first
>> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_FIX)) {
>> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_512MB))
>> > + return EEPROM_RAM_SIZE_512MB;
>> > + if (IS_ENABLED(CONFIG_POCKETBEAGLE2_AM62X_RAM_SIZE_1GB))
>> > + return EEPROM_RAM_SIZE_1GB;
>> > + }
>> > +
>> > +#if IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)
>> > + // dynamically detect the config if we can
>> > + if (!do_board_detect_am6()) {
>> > + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
>> > +
>> > + if (strlen(ep->name) > 11 && ep->name[0] == 'P') {
>> > + /*
>> > + * POCKETBEAGL2A00 (am6232 512MB)
>> > + * POCKETBEAGL2A10 (am625 512MB)
>> > + * POCKETBEAGL2A1I (am625 1GB)
>> > + */
>> > + if (!strncmp(&ep->name[11], "2A1I", 4))
>> > + return EEPROM_RAM_SIZE_1GB;
>> > + }
>> > + }
>> > +#endif
>> > +
>> > + return EEPROM_RAM_SIZE_512MB;
>> > +}
>> > +
>> > int dram_init(void)
>> > {
>> > - return fdtdec_setup_mem_size_base();
>> > + if (!IS_ENABLED(CONFIG_CPU_V7R))
>>
>> I don't have a 1GiB pb2 to test with but I'm assuming the fixed up
>> memory nodes get passed from the R5 SPL to A53 SPL and then finally to
>> U-Boot as part of fixup_memory_node from k3-ddr.c.
>
> @Andrei Aldea ^ can you help ;)
>
Andrei has agreed to give me a board tomorrow so I don't have to test this all
through a proxy.
>> Could somebody confirm if this is indeed the correct flow? I wanted to
>> see if both A53 SPL and U-Boot receive the correct memory size as part
>> of their DT.
>
> Sadly while developing this, the DT memory values were not passed
> between the R5 SPL and the A53 SPL ( and thus A53 main )..
>
> After thinking about this routine since I came up with it last month,
> it might be better to do 2 device-tree's... So with 512MB default
> path, for 1GB, patch ddr timing in R5/SPL and force 1GB device tree.
> Then A53/SPL (and main) would have the correct memory size..
>
> Currently, we read the eeprom 3 times, R5 SPL, A53 SPL and A53 main..
> (but we only need it really twice, R5 SPL (ddr patch) and the A53 main
> (device-tree values patching..)
>
>
>>
>> > + return fdtdec_setup_mem_size_base();
>> > +
>> > + return 0;
>> > }
>> >
>> > +// logic after this block assumes that there is only 1 DRAM bank currently
>> > +#if CONFIG_NR_DRAM_BANKS != 1
>> > +#error Unsupported number of DRAM banks!
>> > +#endif
>> > +
>> > int dram_init_banksize(void)
>> > {
>> > - return fdtdec_setup_memory_banksize();
>> > + u8 ram_size;
>> > +
>> > + if (!IS_ENABLED(CONFIG_CPU_V7R))
>> > + return fdtdec_setup_memory_banksize();
>> > +
>> > + memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]));
>> > +
>> > + ram_size = pocketbeagle2_get_ddr_size();
>> > + switch (ram_size) {
>> > + case EEPROM_RAM_SIZE_1GB:
>> > + gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
>> > + gd->bd->bi_dram[0].size = 0x40000000;
>> > + gd->ram_size = 0x40000000;
>> > + break;
>> > + case EEPROM_RAM_SIZE_512MB:
>> > + default:
>> > + gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
>> > + gd->bd->bi_dram[0].size = 0x20000000;
>> > + gd->ram_size = 0x20000000;
>>
>> We can make use of SZ_512M and SZ_1G macros here.
>>
>> > + break;
>> > + }
>> > +
>> > + return 0;
>> > +}
>> > +
>> > +#if IS_ENABLED(CONFIG_K3_DDRSS)
>> > +static int update_ddrss_timings(void)
>> > +{
>> > + int ret = 0;
>> > + u8 ram_size = 0;
>>
>> Having a u8 of "ram_size" is confusing, we should make it explict that
>> it's an index into pocketbeagle2_ddrss_data.
I assume you just want some explicit typedef for this then? Or was your comment
more about the naming?
>> > + struct ddrss *ddr_patch = NULL;
>> > + void *fdt = (void *)gd->fdt_blob;
>> > +
>> > + ram_size = pocketbeagle2_get_ddr_size();
>> > + ddr_patch = &pocketbeagle2_ddrss_data[ram_size];
>> > +
>> > + if (!ddr_patch)
>> > + return ret;
>> > +
>> > + ret = fdt_apply_ddrss_timings_patch(fdt, ddr_patch);
>> > + if (ret) {
>> > + printf("Failed to apply ddrs timings patch: %d\n", ret);
>> > + return ret;
>> > + }
>> > +
>> > + return ret;
>> > +}
>> > +
>> > +int do_board_detect(void)
>> > +{
>> > + void *fdt = (void *)gd->fdt_blob;
>> > + u64 start[] = {gd->bd->bi_dram[0].start};
>> > + u64 size[] = {gd->bd->bi_dram[0].size};
>> > + int ret;
>> > +
>>
>> Nit: formatting (done with clang-format)
>>
>> - u64 start[] = {gd->bd->bi_dram[0].start};
>> - u64 size[] = {gd->bd->bi_dram[0].size};
>> + u64 start[] = { gd->bd->bi_dram[0].start };
>> + u64 size[] = { gd->bd->bi_dram[0].size };
>> ...
>> - snprintf(fdtfile, sizeof(fdtfile), "%s.dtb", CONFIG_DEFAULT_DEVICE_TREE);
>> + snprintf(fdtfile, sizeof(fdtfile), "%s.dtb",
>> + CONFIG_DEFAULT_DEVICE_TREE);
>>
>>
>> > + dram_init();
>> > + dram_init_banksize();
>> > +
>> > + ret = fdt_fixup_memory_banks(fdt, start, size, 1);
>> > + if (ret) {
>> > + printf("Failed to fixup memory banks: %d\n", ret);
>> > + return ret;
>> > + }
>> > +
>> > + return update_ddrss_timings();
>> > }
>> > +#endif /* CONFIG_K3_DDRSS */
>> >
>> > #if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
>> > int board_late_init(void)
>> > diff --git a/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h b/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
>> > new file mode 100644
>> > index 00000000000..6d248ce6dfa
>> > --- /dev/null
>> > +++ b/board/beagle/pocketbeagle2/pocketbeagle2_ddr.h
>> > @@ -0,0 +1,50 @@
>> > +/* SPDX-License-Identifier: GPL-2.0+ */
>> > +/*
>> > + * DDR override logic for AM625 PocketBeagle 2
>> > + * https://www.beagleboard.org/boards/pocketbeagle-2
>> > + *
>> > + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
>> > + */
>> > +
>> > +#ifndef __POCKETBEAGLE2_DDR_H
>> > +#define __POCKETBEAGLE2_DDR_H
>> > +
>> > +#include "../../phytec/common/k3/k3_ddrss_patch.h"
>> > +
>> > +enum {
>> > + EEPROM_RAM_SIZE_512MB = 0,
>> > + EEPROM_RAM_SIZE_1GB = 1
>> > +};
>> > +
>> > +struct ddr_reg ddr_1gb_ctl_regs[] = {
>> > + { 317, 0x00000101 },
>> > + { 318, 0x1FFF0000 },
>> > +};
>> > +
>> > +struct ddr_reg ddr_1gb_pi_regs[] = {
>> > + { 77, 0x04010100 },
>> > +};
>> > +
>> > +struct ddrss pocketbeagle2_ddrss_data[] = {
>> > + // default configuration
>> > + [EEPROM_RAM_SIZE_512MB] = {
>> > + .ctl_regs = NULL,
>> > + .ctl_regs_num = 0,
>> > + .pi_regs = NULL,
>> > + .pi_regs_num = 0,
>> > + .phy_regs = NULL,
>> > + .phy_regs_num = 0,
>> > + },
>> > +
>> > + // industrial configuration
>> > + [EEPROM_RAM_SIZE_1GB] = {
>> > + .ctl_regs = &ddr_1gb_ctl_regs[0],
>> > + .ctl_regs_num = ARRAY_SIZE(ddr_1gb_ctl_regs),
>> > + .pi_regs = &ddr_1gb_pi_regs[0],
>> > + .pi_regs_num = ARRAY_SIZE(ddr_1gb_pi_regs),
>> > + .phy_regs = NULL,
>> > + .phy_regs_num = 0,
>> > + },
>> > +};
>> > +
>> > +#endif /* __POCKETBEAGLE2_DDR_H */
>> > diff --git a/configs/am62_pocketbeagle2_r5_defconfig b/configs/am62_pocketbeagle2_r5_defconfig
>> > index e863204cfef..d72f78b932c 100644
>> > --- a/configs/am62_pocketbeagle2_r5_defconfig
>> > +++ b/configs/am62_pocketbeagle2_r5_defconfig
>> > @@ -14,7 +14,7 @@ CONFIG_DM_GPIO=y
>> > CONFIG_SPL_DM_SPI=y
>> > CONFIG_DEFAULT_DEVICE_TREE="k3-am62-r5-pocketbeagle2"
>> > CONFIG_DM_RESET=y
>> > -CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
>> > +CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
>> > CONFIG_SPL_MMC=y
>> > CONFIG_SPL_SERIAL=y
>> > CONFIG_SPL_DRIVERS_MISC=y
>> > @@ -42,6 +42,7 @@ CONFIG_SPL_SYS_MALLOC=y
>> > CONFIG_SPL_EARLY_BSS=y
>> > CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
>> > CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
>> > +CONFIG_SPL_I2C=y
>> > CONFIG_SPL_DM_MAILBOX=y
>> > CONFIG_SPL_DM_RESET=y
>> > CONFIG_SPL_POWER_DOMAIN=y
>> > @@ -73,6 +74,8 @@ CONFIG_SPL_CLK_K3_PLL=y
>> > CONFIG_SPL_CLK_K3=y
>> > CONFIG_TI_SCI_PROTOCOL=y
>> > CONFIG_DA8XX_GPIO=y
>> > +CONFIG_DM_I2C=y
>> > +CONFIG_SYS_I2C_OMAP24XX=y
>> > CONFIG_DM_MAILBOX=y
>> > CONFIG_K3_SEC_PROXY=y
>> > CONFIG_SPL_MISC=y
>>
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