[PATCH] lmb: Reinstate access to memory above ram_top

[Marek Vasut]

On 3/24/26 1:10 PM, Casey Connolly wrote:

Hello Casey,

>>>> Which means, before we can really start switching boards to relocate to
>>>> 64bit space, we need to find all these remaining 32bit limitation sites
>>>> and fix them first. And to do that, we would need some way to force
>>>> allocation from 32bit space for drivers which need that ... do we
>>>> already have such a thing ? I couldn't find anything.
>>>
>>> For some (non-upstream) Qualcomm drivers we have just used lmb with
>>> LMB_ALLOC_MAX and passed in 4GB as the max address, it would be nice to
>>> have a wrapper function for this.
>>>
>>> Maybe this would just cause a whole bunch of other issues but perhaps it
>>> would be easiest to have a config option to place the malloc arena in
>>> 32-bit memory rather than always directly below U-Boot? Then again I
>>> imagine this is something that has been bikeshed in the past...
>>
>> Are those qualcomm devices suffering from 32bit DMA limitation too ?
> 
> Yeah, this is how we handle allocating the framebuffer for
> not-yet-upstream display support.
> 
> Would it be possible to use SMMU TLBs to allow (most) 32-bit-only
> peripherals to access 64-bit addresses?

This could indeed be an option, with some swiotlb . How do we handle 
transfers longer than 4 GiB , e.g. if someone is reading continuous 
block of 5 GiB from eMMC into DRAM ?

>>> *casey grumbles something about making relocation optional and merging
>>> the f/r init sequences for most boards*
>>
>> Can you try CONFIG_SKIP_RELOCATE for your use case ?
> 
> That works fine, I'm mostly frustrated with the whole pre-reloc FDT
> scanning/DM init, lack of dcache, etc... So pretty unrelated issues heh.

The list of initcalls in board_f.c and board_r.c seems to be a bit more 
flexible now, I wonder if it can be turned into an actual linker list 
with the ability to register arbitrary new entries at specific levels, 
similar to what sysvinit did with Snnscriptname . The nn would define 
ordering, since the linker lists are sorted. That would let you add e.g. 
S00startcachesearly entry.