[PATCH] arm: Add ARMv8-M aarch32 support

[Kumar, Udit]

Thanks Marek,

On 3/25/2026 6:43 AM, Marek Vasut wrote:
> Add configuration for ARMv8-M aarch32 core, which are currently
> Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
> cores, except the code has to be compiled with matching compiler
> -march=armv8-m.main flag . These cores have no MMU, they have MPU,
> which is currently not configured.
> 
> Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
> SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
> initialization code is built from from arch/arm/cpu/armv7m and not
> armv8. Furthermore, CONFIG_ARM64 must be disabled, although DTs
> for devices using these cores do come from arch/arm64/boot/dts .
> 
> To avoid excess duplication in Makefiles, introduce one new Kconfig
> symbol, CPU_V78M. The CPU_V78M cover both ARMv7-M and ARMv8-M cores.
> 
> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
> ---
> Cc: Casey Connolly <casey.connolly at linaro.org>
> Cc: Heinrich Schuchardt <xypron.glpk at gmx.de>
> Cc: Ilias Apalodimas <ilias.apalodimas at linaro.org>
> Cc: Jerome Forissier <jerome.forissier at arm.com> <jerome at forissier.org>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: u-boot at lists.denx.de
> ---
>  Makefile                         |  8 ++++++--
>  arch/arm/Kconfig                 | 18 +++++++++++++++---
[..]>
> +config CPU_V8M
> +	bool
> +	select CPU_V78M
> +	select SYS_CACHE_SHIFT_6

referring to M55 TRM [0], (which seems to be next processor in this
family)  page- (68-69) CCSIDR,
LTM cache size is not default to 64.
my suggestion will be to keep cache line same as of V7M, unless you
think otherwise.


> +
>  config SYS_CPU
>  	default "arm720t" if CPU_ARM720T
>  	default "arm920t" if CPU_ARM920T
> @@ -389,6 +399,7 @@ config SYS_CPU
>  	default "armv7" if CPU_V7A
>  	default "armv7" if CPU_V7R
>  	default "armv7m" if CPU_V7M
> +	default "armv7m" if CPU_V8M
>  	default "armv8" if ARM64
>  
>  config SYS_ARM_ARCH
> @@ -402,6 +413,7 @@ config SYS_ARM_ARCH
>  	default 7 if CPU_V7A
>  	default 7 if CPU_V7M
>  	default 7 if CPU_V7R
> +	default 7 if CPU_V8M
>  	default 8 if ARM64
>  
>  choice
> @@ -445,7 +457,7 @@ config ARCH_CPU_INIT
>  
>  config SYS_ARCH_TIMER
>  	bool "ARM Generic Timer support"
> -	depends on CPU_V7A || CPU_V7M || ARM64
> +	depends on CPU_V7A || CPU_V78M || ARM64
>  	default y if ARM64
>  	help
>  	  The ARM Generic Timer (aka arch-timer) provides an architected
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index b36b0742580..de975fc9368 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -16,6 +16,7 @@ arch-$(CONFIG_CPU_V7A)		=$(call cc-option, -march=armv7-a, \
>  				 $(call cc-option, -march=armv7))
>  arch-$(CONFIG_CPU_V7M)		=-march=armv7-m
>  arch-$(CONFIG_CPU_V7R)		=-march=armv7-r
> +arch-$(CONFIG_CPU_V8M)		=-march=armv8-m.main
>  ifeq ($(CONFIG_ARM64_CRC32),y)
>  arch-$(CONFIG_ARM64)		=-march=armv8-a+crc
>  else
> @@ -42,6 +43,7 @@ tune-$(CONFIG_CPU_ARM1136)	=
>  tune-$(CONFIG_CPU_ARM1176)	=
>  tune-$(CONFIG_CPU_V7A)		=-mtune=generic-armv7-a
>  tune-$(CONFIG_CPU_V7R)		=
> +tune-$(CONFIG_CPU_V8M)		=
>  tune-$(CONFIG_ARM64)		=
>  
>  # Evaluate tune cc-option calls now
> diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile
> index baeac9343d9..33d49dc3d35 100644
> --- a/arch/arm/cpu/armv7m/Makefile
> +++ b/arch/arm/cpu/armv7m/Makefile
> @@ -4,6 +4,7 @@
>  # Wolfgang Denk, DENX Software Engineering, wd at denx.de.
>  
>  extra-y := start.o
> -obj-y += cpu.o cache.o
> +obj-y += cache.o
> +obj-$(CONFIG_CPU_V7M) += cpu.o

Why you are dropping cpu.c compilation

>  obj-$(CONFIG_SYS_ARM_MPU) += mpu.o
>  obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o
> diff --git a/arch/arm/include/asm/armv7_mpu.h b/arch/arm/include/asm/armv7_mpu.h
> index 16b9d0d1aeb..b615b1bc9dc 100644
> --- a/arch/arm/include/asm/armv7_mpu.h
> +++ b/arch/arm/include/asm/armv7_mpu.h
> @@ -11,7 +11,7 @@
[..]
[0]
https://documentation-service.arm.com/static/6622c173fabc8c11c7b53a92?token=