[PATCH v2 1/4] imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC
Peng Fan (OSS)
peng.fan at oss.nxp.com
Mon Mar 30 16:04:03 CEST 2026
From: Peng Fan <peng.fan at nxp.com>
Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC
handling.
Changes include:
- Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig.
- Drop legacy SPL I2C and PMIC options.
- Remove manual I2C1 pad setup and legacy power_pca9450_init() usage.
- Use DM-based pmic_get() with the DT node "pmic at 25".
- Update PMIC register programming to use struct udevice API.
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
.../arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 22 ++++++++++-
board/phytec/phycore_imx8mp/spl.c | 43 +++++++---------------
configs/phycore-imx8mp_defconfig | 10 ++---
3 files changed, 38 insertions(+), 37 deletions(-)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
index 4804a204e92..e9403d9ea82 100644
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
@@ -34,6 +34,18 @@
};
};
+&pinctrl_i2c1 {
+ bootph-all;
+};
+
+&pinctrl_pmic {
+ bootph-all;
+};
+
+&{/soc at 0/bus at 30800000/i2c at 30a20000/pmic at 25/regulators} {
+ bootph-all;
+};
+
®_usdhc2_vmmc {
bootph-pre-ram;
};
@@ -83,11 +95,11 @@
};
&i2c1 {
- bootph-pre-ram;
+ bootph-all;
};
&pmic {
- bootph-pre-ram;
+ bootph-all;
};
&usb_dwc3_0 {
@@ -96,6 +108,12 @@
&usdhc2 {
bootph-pre-ram;
+ /*
+ * LDO5 output depends on SD2_VSEL, but no way to read back SD2_VSEL
+ * when using SDHC controller VSELECT to control SD2_VSEL. So drop
+ * vqmmc-supply to avoid fsl_esdhc_imx read back wrong voltage.
+ */
+ /delete-property/ vqmmc-supply;
};
&usdhc3 {
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index fc7aefd0073..fc6f5104925 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -117,45 +117,32 @@ out:
ddr_init(&dram_timing);
}
-#define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
- .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
- .gp = IMX_GPIO_NR(5, 14),
- },
- .sda = {
- .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
- .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
- .gp = IMX_GPIO_NR(5, 15),
- },
-};
-
int power_init_board(void)
{
- struct pmic *p;
+ struct udevice *dev;
int ret;
- ret = power_pca9450_init(0, 0x25);
- if (ret)
- printf("power init failed");
- p = pmic_get("PCA9450");
- pmic_probe(p);
+ ret = pmic_get("pmic at 25", &dev);
+ if (ret == -ENODEV) {
+ puts("No pmic at 25\n");
+ return 0;
+ }
+ if (ret < 0)
+ return ret;
/* BUCKxOUT_DVS0/1 control BUCK123 output */
- pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
/* Increase VDD_SOC and VDD_ARM to OD voltage 0.95V */
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
- pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
/* Set BUCK1 DVS1 to suspend controlled through PMIC_STBY_REQ */
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
- pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
/* Set WDOG_B_CFG to cold reset */
- pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
+ pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
return 0;
}
@@ -193,8 +180,6 @@ void board_init_f(ulong dummy)
enable_tzc380();
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
power_init_board();
/* DDR initialization */
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 2fcf7db9e5c..51d9737afb3 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -10,7 +10,6 @@ CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000
@@ -113,8 +112,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -144,15 +141,16 @@ CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
CONFIG_DM_RNG=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
--
2.51.0
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