Re: [PATCH v3 0/7] qcom: Add NVMEM bitfield support and reboot‑mode integration
Heinrich Schuchardt
xypron.glpk at gmx.de
Mon Mar 30 21:14:17 CEST 2026
Am 30. März 2026 19:14:12 MESZ schrieb Aswin Murugan <aswin.murugan at oss.qualcomm.com>:
>This patch series introduces bit-level granularity to NVMEM cells and
>adds complete reboot-mode support for Qualcomm platforms that store
>reboot reasons in PMIC registers.
>
>Qualcomm SoCs rely on PMIC-backed reboot reason storage to implement
>features like "reboot bootloader" for entering fastboot mode. However,
>these PMIC registers often pack multiple fields into a single byte,
>requiring fine-grained bit access that the current NVMEM subsystem does
>not support.
>
>In addition, PMIC generations differ in how reboot-related data is
>stored: older PMICs use PON (Power On) registers, while newer ones
>provide SDAM regions. This series introduces a unified, NVMEM-based
>approach that works seamlessly across both architectures.
>
>This version also integrates reboot-mode handling into Qualcomm board
>initialization, enabling automatic fastboot entry when the reboot reason
>indicates bootloader mode.
>
>Signed-off-by: Aswin Murugan <aswin.murugan at oss.qualcomm.com>
It is unclear to me how endianness is handled in bitfields. Do you assume low-endianness or do you consider the system endianness? Please, ensure that the tests are executed on both low- and big-endian systems.
Best regards
Heinrich
>
>---
>Changes in v3:
>1. Simplified bit field handling to maximum u32 size (32 bits).
>2. Enforced strict size matching (size == cell->size) when nbits == 0.
>3. Enhanced test function for NVMEM read & write
>4. Updated NVMEM API documentation
>
>Link to V2:
>https://lore.kernel.org/all/20260213112717.1256823-1-aswin.murugan@oss.qualcomm.com/
>
>Changes in v2:
>1. Replaced custom reboot reason handling with the standard U-Boot
> reboot-mode subsystem, per review feedback.
>2. Added bit-field support to the NVMEM core using the new "bits"
> property.
>3. Introduced the Qualcomm SPMI SDAM driver for unified PMIC storage
> access.
>4. Updated the reboot-mode driver to support variable-sized NVMEM cells.
>5. Added device tree configuration for the QCS615 RIDE board.
>6. Enabled reboot-mode in qcom_defconfig.
>7. Integrated reboot-mode detection into Snapdragon board
> initialization:
> - Added qcom_handle_reboot_mode() in board_late_init() to enable
> automatic fastboot entry on "reboot bootloader".
>
>Link to v1:
>https://lore.kernel.org/all/20260108065533.1143179-1-aswin.murugan@oss.qualcomm.com/
>---
>
>
>Aswin Murugan (7):
> misc: Add support for bit fields in NVMEM cells
> misc: qcom: Add Qualcomm SPMI SDAM NVMEM driver
> mach-snapdragon: Integrate reboot-mode handling
> dts: qcs615-ride-u-boot.dtsi: Add reboot-mode support
> qcom_defconfig: Enable reboot-mode support in qcom_defconfig
> test: dm: add comprehensive tests for NVMEM bit field operations
> misc: update API documentation for bit field support in NVMEM
>
> arch/arm/dts/qcs615-ride-u-boot.dtsi | 26 ++++
> arch/arm/mach-snapdragon/board.c | 56 ++++++--
> arch/sandbox/dts/test.dts | 12 ++
> configs/qcom_defconfig | 3 +
> drivers/misc/Kconfig | 8 ++
> drivers/misc/Makefile | 1 +
> drivers/misc/nvmem.c | 159 ++++++++++++++++++---
> drivers/misc/qcom-spmi-sdam.c | 200 +++++++++++++++++++++++++++
> include/nvmem.h | 28 +++-
> test/dm/reboot-mode.c | 137 ++++++++++++++++++
> 10 files changed, 595 insertions(+), 35 deletions(-)
> create mode 100644 drivers/misc/qcom-spmi-sdam.c
>
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