[PATCH v2 3/3] ddr: socfpga: Add ECC DRAM scrubbing support for Gen5/Arria10

Marek Vasut marek.vasut at mailbox.org
Thu May 7 14:50:34 CEST 2026


On 5/7/26 8:07 AM, Yuslaimi, Alif Zakuan wrote:

[...]

>> Even the commit message of this patch is a duplicate of that one in the
>> commit from 2018 ? What is going on here ?
> 
> This patch was derived from the original commit you have mentioned.
> 
> The intention of this patch is to bring over the ECC scrubbing support 
> to Gen5 as well via a new common DDR driver shared by both Arria10 and 
> Gen5 devices which is sdram_soc32.c. This makes ECC scrubbing support no 
> longer exclusive only to Arria10.
> 
> Perhaps staying close to the original patch subject and message to 
> describe the original functionality might have create some confusion 
> here. I can rephrase the subject and the commit message for v3.
Yes please , rephrase it , what you wrote in the two paragraphs above is 
very close to what the commit message should contain.


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