[ELDK] Linux DWC OTG driver in host-only mode

Felix Radensky felix at embedded-sol.com
Thu Apr 30 12:25:13 CEST 2009


I'm using DWC OTG driver from Denx kernel in linux-2.6.27 vanilla
kernel running on custom 405EXr based board. The OTG controller
is connected to ISP1504 USB PHY, configured for host-only operation
(ID pin is connected to 3.3V and should be ignored).

I've copied all files under drivers/usb/gadget/dwc_otg from denx kernel
to my kernel. I've also copied arch/powerpc/platforms/40x/kilauea-usb.c
and USB node from kilauea DTS.

I've used the following compilation flags to build dwc_otg driver:


The driver compiles and loads file. It also detects OTG correctly, but 
decides that
controller is operating in device mode, and this insertion of USB Disk 
on Key has
no effect.

What should be done to force the driver into host-only operation (make 
it ignore
the value of ID pin) ? I've tried passing otg_cap=1 and otg_cap=2 module 
but that didn't help. Below is debug output produced by driver.

dwc_otg: version 2.60a 22-NOV-2006
dwc_otg dwc_otg.0: dwc_otg_driver_probe(c029aa50)
dwc_otg dwc_otg.0: OTG - device irq: 17
dwc_otg dwc_otg.0: OTG - ioresource_mem start0xef6c0000: end:0xef6cffff
dwc_otg dwc_otg.0: mapped base=0xe4fe0000
dwc_otg dwc_otg.0: dwc_otg_device=0xdfa78a40
PHY Type is is set to 2
dwc_otg: dwc_otg_core_init(dfaf1800)
dwc_otg: USB config register: 0x00001410
dwc_otg: dwc_otg_core_reset
dwc_otg: num_dev_perio_in_ep=1
dwc_otg: Is power optimization enabled?  Yes
dwc_otg: vbus_valid filter enabled?  No
dwc_otg: iddig filter enabled?  No
dwc_otg: Periodic Tx FIFO SZ #0=0x300
dwc_otg: Tx FIFO SZ #0=0x300
dwc_otg: Tx FIFO SZ #1=0x0
dwc_otg: Total FIFO SZ=2048
dwc_otg: Rx FIFO SZ=531
dwc_otg: NP Tx FIFO SZ=256
dwc_otg: High spped PHY
dwc_otg: UTMI+ 16
dwc_otg: dwc_otg_core_reset
dwc_otg: Setting ULPI FSLS=0
dwc_otg: Internal DMA Mode
dwc_otg: Device Mode
dwc_otg: HCD Added channel #0, hc=dfa78680
dwc_otg: HCD Added channel #1, hc=dfa78600
dwc_otg: HCD Added channel #2, hc=dfa78380
dwc_otg: HCD Added channel #3, hc=dfa78400
dwc_otg: Using DMA mode
dwc_otg dwc_otg.0: DWC OTG Controller
dwc_otg dwc_otg.0: new USB bus registered, assigned bus number 1
dwc_otg dwc_otg.0: irq 17, io mem 0x00000000
dwc_otg: DWC OTG HCD Has Root Hub
dwc_otg: dwc_otg_core_host_init(dfaf1800)
dwc_otg: Initializing HCFG.FSLSPClkSel to 0x0
dwc_otg: Total FIFO Size=2048
dwc_otg: Rx FIFO Size=531
dwc_otg: NP Tx FIFO Size=256
dwc_otg: P Tx FIFO Size=768
dwc_otg: initial grxfsiz=00000213
dwc_otg: new grxfsiz=00000213
dwc_otg: initial gnptxfsiz=01000213
dwc_otg: new gnptxfsiz=01000213
dwc_otg: initial hptxfsiz=01000313
dwc_otg: new hptxfsiz=03000313
dwc_otg: Flush Tx FIFO 16
dwc_otg: dwc_otg_flush_rx_fifo
dwc_otg: dwc_otg_core_host_init: Halt channel 0
dwc_otg: dwc_otg_core_host_init: Halt channel 1
dwc_otg: dwc_otg_core_host_init: Halt channel 2
dwc_otg: dwc_otg_core_host_init: Halt channel 3
dwc_otg: Init: Port op_state=4
dwc_otg: dwc_otg_enable_host_interrupts()
usb usb1: configuration #1 chosen from 1 choice
hub 1-0:1.0: USB hub found
dwc_otg: DWC OTG HCD HUB CONTROL - GetHubDescriptor
hub 1-0:1.0: 1 port detected
dwc_otg: DWC OTG HCD HUB CONTROL - GetHubStatus
dwc_otg: DWC OTG HCD HUB CONTROL - GetPortStatus
dwc_otg: DWC OTG HCD Initialized HCD, bus=dwc_otg.0, usbbus=1
dwc_otg: dwc_otg Irq 12 registered

Any hints are very much appreciated.

Thanks a lot in advance.


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