[U-Boot-Users] [PATCH 1/2] add MPC8343 based board mvBlueLYNX-M7 aka mvblm7
André Schwarz
Andre.Schwarz at matrix-vision.de
Fri Apr 11 22:02:38 CEST 2008
Kim,
please review this resubmitted patch with changes as you have requested :
- coding style issues
- Makefile
- Maintainer
- common mpc83xx PCI code
- added README.mvblm7
Please let me know if anything is still invalid or not acceptable.
As mentioned before the merge window is close -> take it into "next" please.
Due to size I have to split the patch.
Thanks,
Andre
Signed-off-by: Andre Schwarz <andre.schwarz at matrix-vision.de>
--
CREDITS | 5 +
MAINTAINERS | 4 +
MAKEALL | 1 +
Makefile | 4 +-
board/mvblm7/Makefile | 48 ++++
board/mvblm7/config.mk | 25 ++
board/mvblm7/fpga.c | 191 ++++++++++++++++
board/mvblm7/fpga.h | 34 +++
board/mvblm7/mvblm7.c | 133 +++++++++++
board/mvblm7/mvblm7.h | 20 ++
board/mvblm7/mvblm7_autoscript | 38 ++++
board/mvblm7/pci.c | 144 ++++++++++++
doc/README.mvblm7 | 84 +++++++
include/configs/MVBLM7.h | 474
++++++++++++++++++++++++++++++++++++++++
14 files changed, 1204 insertions(+), 1 deletions(-)
diff --git a/CREDITS b/CREDITS
index e84ef38..713f58a 100644
--- a/CREDITS
+++ b/CREDITS
@@ -424,6 +424,11 @@ N: Paolo Scaffardi
E: arsenio at tin.it
D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard,
lots more
+N: Andre Schwarz
+E: andre.schwarz at matrix-vision.de
+D: Support for BlueLYNX and BlueCOUGAR series
+W: www.matrix-vision.com
+
N: Robert Schwebel
E: r.schwebel at pengutronix.de
D: Support for csb226, logodl and innokom boards (PXA2xx)
diff --git a/MAINTAINERS b/MAINTAINERS
index 33821b8..93281fd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -367,6 +367,10 @@ Peter De Schrijver <p2 at mind.be>
ML2 PPC4xx
+Andre Schwarz <andre.schwarz at matrix-vision.de>
+
+ mvblm7 MPC8343
+
Timur Tabi <timur at freescale.com>
MPC8349E-mITX MPC8349
diff --git a/MAKEALL b/MAKEALL
index 2a872ac..f21c34e 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -327,6 +327,7 @@ LIST_83xx=" \
MPC8360ERDK_66 \
MPC837XEMDS \
MPC837XERDB \
+ MVBLM7 \
sbc8349 \
TQM834x \
"
diff --git a/Makefile b/Makefile
index a7f886b..9d33482 100644
--- a/Makefile
+++ b/Makefile
@@ -2078,13 +2078,15 @@ MPC837XEMDS_HOST_config: unconfig
MPC837XERDB_config: unconfig
@$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale
+MVBLM7_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7
+
sbc8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
-
#########################################################################
## MPC85xx Systems
#########################################################################
diff --git a/board/mvblm7/Makefile b/board/mvblm7/Makefile
new file mode 100644
index 0000000..84cd14a
--- /dev/null
+++ b/board/mvblm7/Makefile
@@ -0,0 +1,48 @@
+#
+# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o pci.o fpga.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/mvblm7/config.mk b/board/mvblm7/config.mk
new file mode 100644
index 0000000..1d85f4f
--- /dev/null
+++ b/board/mvblm7/config.mk
@@ -0,0 +1,25 @@
+#
+# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+TEXT_BASE = 0xFFF00000
diff --git a/board/mvblm7/fpga.c b/board/mvblm7/fpga.c
new file mode 100644
index 0000000..57ea520
--- /dev/null
+++ b/board/mvblm7/fpga.c
@@ -0,0 +1,191 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland at enterasys.com.
+ * Keith Outwater, keith_outwater at mvis.com.
+ *
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz at matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ACEX1K.h>
+#include <command.h>
+#include "fpga.h"
+#include "mvblm7.h"
+
+#ifdef CONFIG_FPGA
+
+#ifdef FPGA_DEBUG
+#define fpga_debug(fmt,args...) printf(fmt ,##args)
+#else
+#define fpga_debug(fmt,args...)
+#endif
+
+Altera_CYC2_Passive_Serial_fns altera_fns = {
+ fpga_null_fn,
+ fpga_config_fn,
+ fpga_status_fn,
+ fpga_done_fn,
+ fpga_wr_fn,
+ fpga_null_fn,
+ fpga_null_fn,
+ 0
+};
+
+Altera_desc cyclone2 = {
+ Altera_CYC2,
+ passive_serial,
+ Altera_EP2C20_SIZE,
+ (void *) &altera_fns,
+ NULL,
+ 0
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mvblm7_init_fpga(void)
+{
+ fpga_debug("%s:%d: Initialize FPGA interface (relocation offset =
0x%.8lx)\n",
+ __FUNCTION__, __LINE__, gd->reloc_off);
+ fpga_init(gd->reloc_off);
+
+ fpga_debug("%s:%d: Adding fpga 0\n", __FUNCTION__, __LINE__);
+ fpga_add(fpga_altera, &cyclone2);
+
+ return 1;
+}
+
+int fpga_null_fn(int cookie)
+{
+ return 0;
+}
+
+int fpga_config_fn(int assert, int flush, int cookie)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0];
+
+ u32 dvo = gpio->dat;
+ fpga_debug("SET config : %s\n", assert ? "low" : "high");
+ if (assert)
+ dvo |= FPGA_CONFIG;
+ else
+ dvo &= ~FPGA_CONFIG;
+
+ if (flush)
+ gpio->dat = dvo;
+
+ return assert;
+}
+
+int fpga_done_fn(int cookie)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0];
+ int result = 0;
+
+ udelay(10);
+ fpga_debug("CONF_DONE check ... ");
+ if (gpio->dat & FPGA_CONF_DONE) {
+ fpga_debug("high\n");
+ result = 1;
+ } else
+ fpga_debug("low\n");
+
+ return result;
+}
+
+int fpga_status_fn(int cookie)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0];
+ int result = 0;
+
+ fpga_debug("STATUS check ... ");
+ if (gpio->dat & FPGA_STATUS) {
+ fpga_debug("high\n");
+ result = 1;
+ } else
+ fpga_debug("low\n");
+
+ return result;
+}
+
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0];
+
+ u32 dvo = gpio->dat;
+ fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");
+ if (assert_clk)
+ dvo |= FPGA_CCLK;
+ else
+ dvo &= ~FPGA_CCLK;
+
+ if (flush)
+ gpio->dat = dvo;
+
+ return assert_clk;
+}
+
+static inline int _write_fpga(u8 val, int dump )
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0];
+ int i;
+ u32 dvo = gpio->dat;
+
+ if (dump)
+ fpga_debug(" %02x -> ", val);
+ for (i = 0; i < 8; i++) {
+ dvo &= ~FPGA_CCLK;
+ gpio->dat = dvo;
+ dvo &= ~FPGA_DIN;
+ if (dump)
+ fpga_debug("%d ", val&1);
+ if (val & 1)
+ dvo |= FPGA_DIN;
+ gpio->dat = dvo;
+ dvo |= FPGA_CCLK;
+ gpio->dat = dvo;
+ val >>= 1;
+ }
+ if (dump)
+ fpga_debug("\n");
+
+ return 0;
+}
+
+int fpga_wr_fn(void *buf, size_t len, int flush, int cookie)
+{
+ unsigned char *data = (unsigned char *) buf;
+ int i;
+
+ fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
+ for (i = 0; i < len; i++)
+ _write_fpga(data[i], 0);
+ fpga_debug("\n");
+
+ return FPGA_SUCCESS;
+}
+#endif
diff --git a/board/mvblm7/fpga.h b/board/mvblm7/fpga.h
new file mode 100644
index 0000000..e84ff06
--- /dev/null
+++ b/board/mvblm7/fpga.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland at enterasys.com.
+ * Keith Outwater, keith_outwater at mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+extern int mvblm7_init_fpga(void);
+
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
+extern int fpga_status_fn (int cookie);
+extern int fpga_config_fn (int assert, int flush, int cookie);
+extern int fpga_done_fn(int cookie);
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn (void *buf, size_t len, int flush, int cookie);
+extern int fpga_null_fn (int cookie);
diff --git a/board/mvblm7/mvblm7.c b/board/mvblm7/mvblm7.c
new file mode 100644
index 0000000..9142f14
--- /dev/null
+++ b/board/mvblm7/mvblm7.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ *
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz at matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <asm/mpc8349_pci.h>
+#include <pci.h>
+#include <asm/mmu.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+#include "mvblm7.h"
+
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CFG_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1);
+ ddr_size = ddr_size>>1, ddr_size_log2++) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ }
+ im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+ im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) &
LAWAR_SIZE);
+
+ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
+ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+
+ udelay(300);
+
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+
+ return CFG_DDR_SIZE;
+}
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+ msize = fixed_sdram();
+
+ /* return total bus RAM size(bytes) */
+ return msize * 1024 * 1024;
+}
+
+int checkboard(void)
+{
+ puts("Board: Matrix Vision mvBlueLYNX-M7 " MV_VERSION "\n");
+
+ return 0;
+}
+
+u8 *dhcp_vendorex_prep(u8 * e)
+{
+ char *ptr;
+
+ /* DHCP vendor-class-identifier = 60 */
+ if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
+ *e++ = 60;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+ /* DHCP_CLIENT_IDENTIFIER = 61 */
+ if ((ptr = getenv("dhcp_client_id"))) {
+ *e++ = 61;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+
+ return e;
+}
+
+u8 *dhcp_vendorex_proc(u8 * popt)
+{
+ return NULL;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+
+#endif
diff --git a/board/mvblm7/mvblm7.h b/board/mvblm7/mvblm7.h
new file mode 100644
index 0000000..eb1d2a3
--- /dev/null
+++ b/board/mvblm7/mvblm7.h
@@ -0,0 +1,20 @@
+#ifndef __MVBC_H__
+#define __MVBC_H__
+
+#define MV_GPIO
+
+#define FPGA_DIN 0x20000000
+#define FPGA_CCLK 0x40000000
+#define FPGA_CONF_DONE 0x08000000
+#define FPGA_CONFIG 0x80000000
+#define FPGA_STATUS 0x10000000
+
+#define MAN_RST 0x00100000
+#define WD_TS 0x00200000
+#define WD_WDI 0x00400000
+
+#define MV_GPIO_DAT (WD_TS)
+#define MV_GPIO_OUT (FPGA_DIN|FPGA_CCLK|WD_TS|WD_WDI)
+#define MV_GPIO_ODE (FPGA_CONFIG|MAN_RST)
+
+#endif
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
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