[U-Boot] [patch] U-Boot Firetux board support

Jürgen Schöw js at emlix.com
Mon Nov 3 11:15:51 CET 2008


Hi,

I'm impressed you have been very fast with the comments. I've seen the
comments from Peter Tyson and Jean-Christophe PLAGNIOL-VILLARD as well and it
seem I have a lot to change.

On Fri, 31 Oct 2008 12:09:55 -0500, Scott Wood <scottwood at freescale.com>
wrote:

> On Fri, Oct 31, 2008 at 03:30:33PM +0100, Juergen Schoew wrote:
> > +	*(vu_long *)(PNX8181_REG_EBI1_CS0 + PNX8181_EBI_BURST_OFF) =
> > 0x0CF8; +}
> 
> writel() rather than direct access.

OK, good comment, will rework.
 
> > +	unsigned long IO_ADDR_W = (ulong)chip->IO_ADDR_W;
> > +		if (chip->options & NAND_BUSWIDTH_16)
> > +			writew((unsigned short)dat, IO_ADDR_W);
> > +		else
> > +			writeb((unsigned char)dat, IO_ADDR_W);
> 
> writew/writeb take pointers, not integer addresses.

Will change.

> > +static int firetux_nand_readybusy(struct mtd_info *mtd)
> > +{
> > +	return (int)((readl(CONFIG_SYS_NAND_RB_PORT) >> 18) & 1);
> > +}
> 
> Unnecessary cast.  Pass a pointer to readl().

OK.
 
> > +int board_nand_init(struct nand_chip *nand)
> > +{
> > +	nand->cmd_ctrl	 = firetux_nand_hwcontrol;
> > +	nand->dev_ready	 = firetux_nand_readybusy;
> > +	nand->chip_delay = 20;
> > +	nand->ecc.mode	 = NAND_ECC_SOFT;
> > +	nand->options	 = NAND_USE_FLASH_BBT | NAND_BBT_CREATE |
> > NAND_BBT_WRITE
> > +			 | NAND_BBT_VERSION ;
> 
> You cannot pass BBT options as chip options.  Of the above, only
> NAND_USE_FLASH_BBT is a chip option.

You are right. I missed that. I have a 256MByte NAND flash on the board and
tried to reduce the boot time. It seem I have mixed something here.

> Is there any reason you don't use nand_spl?

Hmm, I'm not sure to understand you correct. nand_spl is a new method to
bootstrap the system. From doc/README.nand-boot-ppc440:

b) SPL (Secondary Program Loader)
---------------------------------
Will load special U-Boot version (NUB) from NAND and execute it. This SPL
has to fit into 4kByte. It sets up the CPU and configures the SDRAM
controller and the NAND controller so that the special U-Boot image can be
loaded from NAND to SDRAM.
This special image is build in the directory "nand_spl".

This seems to be similair to the Steppingstone bootloader from Samsung. This
SPL is already in the eeprom of the system and will be (hopefully) integrated 
in the cpu rom mask for the next revision.

If I see it correct, I have to define the whole parameterset for the NAND
chip in the configfile rather than let the mtd layer detect it. So I do not
see any reason to use SPL. But maybe you can point me to the right direction.

Regards

Jürgen Schöw
-- 
Dipl.-Ing. Jürgen Schöw, emlix GmbH, http://www.emlix.com, mailto:js at emlix.com
Fon +49 551 30664-0, Fax -11, Bahnhofsallee 1b, 37081 Göttingen, Germany
Geschäftsführung: Dr. Uwe Kracke, Dr. Cord Seele, Ust-IdNr.: DE 205 198 055
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