[U-Boot] [PATCH 3/6] AVR32: Use SRAM as main memory on the atevk1100 board

[Gunnar Rangoy]

This patch makes u-boot use SRAM instead of SDRAM as main memory.
This is done due to a bug in the current revsions of the
at32uc3a0xxx series microcontrollers, which makes it unreliable to
run code from SDRAM.

Signed-off-by: Gunnar Rangoy <gunnar at rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp at gmail.com>
Signed-off-by: Olav Morken <olavmrk at gmail.com>
---
 board/atmel/atevk1100/atevk1100.c |   65 ++++++++++++++++++++++++------------
 include/configs/atevk1100.h       |   12 ++++---
 2 files changed, 50 insertions(+), 27 deletions(-)

diff --git a/board/atmel/atevk1100/atevk1100.c b/board/atmel/atevk1100/atevk1100.c
index 105e5c9..a85337e 100644
--- a/board/atmel/atevk1100/atevk1100.c
+++ b/board/atmel/atevk1100/atevk1100.c
@@ -22,30 +22,51 @@
 #include <common.h>
 
 #include <asm/io.h>
-#include <asm/sdram.h>
+#include <asm/sram.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hmatrix.h>
 #include <asm/arch/portmux.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const struct sdram_config sdram_config = {
-	/* MT48LC16M16A2-7E (32 MB) */
-	.data_bits	= SDRAM_DATA_16BIT,
-	.row_bits	= 13,
-	.col_bits	= 9,
-	.bank_bits	= 2,
-	.cas		= 2,
-	.twr		= 2,
-	.trc		= 7,
-	.trp		= 2,
-	.trcd		= 2,
-	.tras		= 4,
-	.txsr		= 7,
-	/* 7.81 us */
-	.refresh_period	= (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
-};
+static const struct sram_config sram_config = {
+	/* 2x16MBit, CY7C1069AV33-10ZXC */
+	.data_bits	= 16,
+	.address_bits	= 21,
+	.ncs_rd_setup	= 0,
+	.ncs_wr_setup 	= 0,
+	.nwe_setup	= 0,
+	.nrd_setup	= 0,
+	/*
+	 * These settings works when running at 33Mhz,
+	 * but fails at 54MHz
+	 */
+
+	/*
+	.ncs_wr_pulse 	= 1,
+	.ncs_rd_pulse	= 1,
+	.nwe_pulse	= 1,
+	.nrd_pulse	= 1,
+	.nwe_cycle	= 2,
+	.nrd_cycle	= 2,
+	*/
+	.ncs_wr_pulse 	= 2,
+	.ncs_rd_pulse	= 2,
+	.nwe_pulse	= 2,
+	.nrd_pulse	= 2,
+	.nwe_cycle	= 3,
+	.nrd_cycle	= 3,
+	.chip_select	= 2,
+	.read_mode	= 1,
+	.write_mode	= 1,
+	.exnw_mode	= 0,
+	.bat		= 1,
+	.tdf_cycles	= 0,
+	.tdf_mode	= 0,
+	.pmen		= 0,
+	.ps		= 1,
 
+};
 int board_early_init_f(void)
 {
 	/* Enable SDRAM in the EBI mux according to AP7000 datasheet */
@@ -65,14 +86,14 @@ phys_size_t initdram(int board_type)
 {
 	unsigned long expected_size;
 	unsigned long actual_size;
-	void *sdram_base;
+	void *sram_base;
 
-	sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE);
+	sram_base = map_physmem(EBI_SRAM_CS2_BASE, EBI_SRAM_CS2_SIZE, MAP_NOCACHE);
 
-	expected_size = sdram_init(sdram_base, &sdram_config);
-	actual_size = get_ram_size(sdram_base, expected_size);
+	expected_size = sram_init(&sram_config);
+	actual_size = get_ram_size(sram_base, expected_size);
 
-	unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
+	unmap_physmem(sram_base, EBI_SRAM_CS2_SIZE);
 
 	if (expected_size != actual_size)
 		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
diff --git a/include/configs/atevk1100.h b/include/configs/atevk1100.h
index db5af37..166027a 100644
--- a/include/configs/atevk1100.h
+++ b/include/configs/atevk1100.h
@@ -148,7 +148,8 @@
 #define CONFIG_ATMEL_SPI		1
 #define CONFIG_PORTMUX_GPIO		1
 #define CFG_NR_PIOS			5
-#define CFG_SDRAMC			1
+#define CFG_SDRAMC			0
+#define CFG_SMC				1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
@@ -165,7 +166,8 @@
 
 #define CFG_INTRAM_BASE			INTERNAL_SRAM_BASE
 #define CFG_INTRAM_SIZE			INTERNAL_SRAM_SIZE
-#define CFG_SDRAM_BASE			EBI_SDRAM_BASE
+/* Not really SDRAM, maybe change to SRAM? */
+#define CFG_SDRAM_BASE			EBI_SRAM_CS2_BASE
 
 #define CONFIG_ENV_IS_IN_FLASH		1
 #define CONFIG_ENV_SIZE			65536
@@ -176,8 +178,8 @@
 #define CFG_MALLOC_LEN			(256*1024)
 #define CFG_DMA_ALLOC_LEN		(16384)
 
-/* Allow 4MB for the kernel run-time image */
-#define CFG_LOAD_ADDR			(EBI_SDRAM_BASE + 0x00400000)
+/* Allow 3MB(TODO:update) for the kernel run-time image */
+#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00270000)
 #define CFG_BOOTPARAMS_LEN		(16 * 1024)
 
 /* Other configuration settings that shouldn't have to change all that often */
@@ -187,7 +189,7 @@
 #define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
 #define CFG_LONGHELP			1
 
-#define CFG_MEMTEST_START		EBI_SDRAM_BASE
+#define CFG_MEMTEST_START		CFG_SDRAM_BASE
 #define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
 #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
 
-- 
1.5.6.3