[U-Boot] MPC5200B: Trouble with config pins

Andre Schwarz andre.schwarz at matrix-vision.de
Fri Nov 21 16:58:16 CET 2008


Jürgen,

Have a look at the manual chapter 4 (=Reset + Config).
SRESET (issued by gpt0 - watchdog) isn't supposed to do a full hardware 
reset.
Looks like you should make use of the SRESET and trigger HRESET accordingly.

I could solve this with _not_ using the internal watchdog but an 
external one (TPS3828),
i.e. watchdog timeouts and reboots are always issued by PORESET.



regards,
Andre


Juergen Beisert schrieb:
> Hi all,
>
> we have trouble with the eth based config pins (ETH0...ETH6) of the MPC5200B 
> CPU. These pins act as the interface to an external phy and also act as 
> configurations pins to configure the size of the flash and other things. 
> While the reset is active these pins should be in their high impedance state 
> and the externally connected pull down resistors should define wire's voltage 
> level. With the rising edge of the reset signal these levels will be latched 
> into internal config registers.
> We are in trouble when we want to reboot the system (also watchdog based) or 
> the internal watchdog barks and generates the CPU internal reset signal. In 
> these cases these config pins will not change their level! So the wrong 
> settings are latched in and our CPU is dead (misconfigured), sometimes a 
> second reset helps, but most of the time only power cycling helps.
>
> What we see is:
>  - at the pins ETH_0 and ETH_3 (both are output only, when used for
>    ethernet)
>
>  * With an external 10k pulldown these lines never change their 3.3V level
>    even if the reset is active!
>  * With an external 1k pulldown these lines change their 3.3V level down to
>    something about 2.5V when the falling edge of the reset signal occurs.
>  * This level decreases slowly to 1.2V in about 1.2ms and than a falling edge
>    to 0V occures. Problem here is, the internal watchdog's generated reset
>    signal is much shorter, so the rising edge of this reset signal also
>    latches in the wrong settings and the CPU is dead.
>
> Some other things we see. A reset while:
>  - a running tftp command in U-Boot with disconnected network
>     -> system is always dead
>  - a running tftp command in U-Boot with connected network
>     -> system restarts
>    We can see in this case, the ETH_0 and ETH_3 are switching to low
>    level *immediatly* with the falling edge of the reset signal
>  - an activated interface ("ifconfig up") in Linux with *disconnected* network
>     -> system is always dead
>  - an activated interface ("ifconfig up") in Linux with *connected* network
>     -> system is always dead
>
> Does anybody see a behaviour like ours on his/her MPC5200B based system?
> Does anybody have an idea what the difference between U-Boot und Linux could 
> be? Bug? Feature?
>
> Regards,
> Juergen
>
>   


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