[U-Boot] Data cache on MPC8248 board

[Scott Wood]

On Wed, Sep 10, 2008 at 10:51:50AM +0200, Rodrigo Vilar wrote:
> I have enabled cache on a MPC8248 board using Block Address Translation. RAM
> is cache enabled, everything else cache inhibited.
> Apparently cache is enabled fine, however system hangs using tftp command
> (in the middle of the transaction) or on external interrupt handling when I
> set up a timer from a standalone application. Please note that if I define
> DBAT0 cache inhibited, both tftp and the standalone program work fine.

Do you have snooping enabled on all of the DMA devices you're using?

> lis r3, 0xF000
> ori r3, r3, BL_256Mb + Valid_Supervisor + Valid_User
> lis r4, 0xF000
> ori r4, r4, Read_Write + Guarded + Cache_Inhibited
> mtspr DBAT2U, r3
> mtspr DBAT3L, r4
> isync

s/DBAT3L/DBAT2L/, presumably.

-Scott