[U-Boot] TSEC ethernet controller problems (crc errors/ corruption)

Ira Snyder iws at ovro.caltech.edu
Wed Jun 3 19:50:25 CEST 2009


On Tue, Jun 02, 2009 at 06:08:17PM -0500, Kim Phillips wrote:
> On Tue, 2 Jun 2009 15:19:18 -0700
> Ira Snyder <iws at ovro.caltech.edu> wrote:
> 
> > On Tue, Jun 02, 2009 at 02:25:03PM -0700, Ira Snyder wrote:
> > > > 
> > > > And what is the SICRH[30-31]?
> > > > Did you have the matching settings for GMII with 3.3V?
> > > > 
> > > 
> > > => md e0000118 1
> > > e0000118: 00000002    ....
> > > 
> > > This looks wrong. The MPC8349EMDS board has the exact same setting in
> > > that register. Writing 0x0 to the SICRH register did not cause the
> > > problem to go away.
> > > 
> > 
> > The MPC8349EMDS config has had that setting since it was imported into
> > U-Boot. I've copied the relevant part of include/configs/MPC8349EMDS.h
> > below.
> > 
> > #define CONFIG_SYS_SICRH SICRH_TSOBI1
> > 
> > This seems wrong for the MPC8349EMDS board. I tried setting the register
> > value to 0x0 by hand on my MPC8349EMDS eval board, and the network still
> > works as expected.
> 
> still works or does not work?  100mbit or 1000mbit??
> 

Network works, both 100 and 1000 mbit.

> > Is this a bug in the MPC8349EMDS config?
> 
> It might be.  Another thing that changed wrt that area was commit
> 846f1574.  Assuming this is all still clear to me, perhaps what that
> patch does should be made 8349-revision dependent?
> 

My MPC8349EMDS reference manual says that bits 28-29 should be
preserved, which is exactly what the commit message states.

I don't see a problem with commit 846f1574 at all. The bug is that SICRH
is set to SICRH_TSOBI1 (0x2), which changes the TSEC1 output buffer
parameters to RGMII/RTBI mode.

The MPC8349EMDS's PHY's are both in GMII mode, the do not use RGMII/RTBI
or any of the other reduced pin count interfaces. Therefore, I think the
bit should be cleared, and SICRH should be set to 0x0.

Even if I'm wrong, then the bits for both TSEC1 and TSEC2 should be the
same.  Right now, TSEC1 has the RGMII/RTBI output parameters, and TSEC2
has the GMII output parameters.

In practice, this doesn't seem to make a difference on the MPC8349EMDS
eval board. Both settings work without any errors. For people like me,
who are copying an existing board port to a similar board, it would be
nice if it was correct.

Thanks,
Ira


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