[U-Boot] TSEC ethernet controller problems (crc errors/ corruption)

[Kim Phillips]

On Wed, 3 Jun 2009 10:50:25 -0700
Ira Snyder <iws at ovro.caltech.edu> wrote:

> On Tue, Jun 02, 2009 at 06:08:17PM -0500, Kim Phillips wrote:
> > On Tue, 2 Jun 2009 15:19:18 -0700
> > Ira Snyder <iws at ovro.caltech.edu> wrote:
> > 
> > > On Tue, Jun 02, 2009 at 02:25:03PM -0700, Ira Snyder wrote:
> > > > > 
> > > > > And what is the SICRH[30-31]?
> > > > > Did you have the matching settings for GMII with 3.3V?
> > > > > 
> > > > 
> > > > => md e0000118 1
> > > > e0000118: 00000002    ....
> > > > 
> > > > This looks wrong. The MPC8349EMDS board has the exact same setting in
> > > > that register. Writing 0x0 to the SICRH register did not cause the
> > > > problem to go away.

ok this...

> > > > 
> > > 
> > > The MPC8349EMDS config has had that setting since it was imported into
> > > U-Boot. I've copied the relevant part of include/configs/MPC8349EMDS.h
> > > below.
> > > 
> > > #define CONFIG_SYS_SICRH SICRH_TSOBI1
> > > 
> > > This seems wrong for the MPC8349EMDS board. I tried setting the register
> > > value to 0x0 by hand on my MPC8349EMDS eval board, and the network still
> > > works as expected.
> > 
> > still works or does not work?  100mbit or 1000mbit??
> > 
> 
> Network works, both 100 and 1000 mbit.

and this seeming contradiction lead to my source of confusion.

What I think is going on is that you're setting SICRH to 0 on your
custom board and it still has its network problems, and setting it to 0
on the original MPC8349E-MDS board makes no difference - networking
works with it set to both 0 and 2.  ok.

> > > Is this a bug in the MPC8349EMDS config?
> > 
> > It might be.  Another thing that changed wrt that area was commit
> > 846f1574.  Assuming this is all still clear to me, perhaps what that
> > patch does should be made 8349-revision dependent?
> > 
> 
> My MPC8349EMDS reference manual says that bits 28-29 should be
> preserved, which is exactly what the commit message states.
> 
> I don't see a problem with commit 846f1574 at all. The bug is that SICRH
> is set to SICRH_TSOBI1 (0x2), which changes the TSEC1 output buffer
> parameters to RGMII/RTBI mode.

yeah my bad, I miscalculated which bits that commit was masking.

> The MPC8349EMDS's PHY's are both in GMII mode, the do not use RGMII/RTBI
> or any of the other reduced pin count interfaces. Therefore, I think the
> bit should be cleared, and SICRH should be set to 0x0.

technically BCSR5 holds the reduced mode MII setting (set via SW4).  The
default is GMII, but, as in the case of the 8360 MDS, networking didn't
work out of the box with the default switch settings.

> Even if I'm wrong, then the bits for both TSEC1 and TSEC2 should be the
> same.  Right now, TSEC1 has the RGMII/RTBI output parameters, and TSEC2
> has the GMII output parameters.
> 
> In practice, this doesn't seem to make a difference on the MPC8349EMDS
> eval board. Both settings work without any errors. For people like me,
> who are copying an existing board port to a similar board, it would be
> nice if it was correct.

granted.  I'm betting the sbc8349 and tqm834x just copied the setting
from the MDS code, so those should get 0 too.  Board maintainers,
please test:

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 3c57403..2d2799e 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -598,7 +598,7 @@
 #define CONFIG_SYS_SCCR_TSEC2CM        1       /* TSEC2 & I2C0 clock mode (0-3)
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT   0x000000000
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 5ca8720..5510730 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -393,7 +393,7 @@ extern int tqm834x_num_flash_banks;
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH       SICRH_TSOBI1
+#define CONFIG_SYS_SICRH       0
 #define CONFIG_SYS_SICRL       SICRL_LDP_A
 
 /* i-cache and d-cache disabled */
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index d0338f1..edd928d 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -519,7 +519,7 @@
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT   0x000000000

Thanks,

Kim