[U-Boot] Enabling ARM DCache (and MMU setup) in U-Boot

[Jean-Christophe PLAGNIOL-VILLARD]

On 15:36 Tue 31 Mar     , Drasko DRASKOVIC wrote:
>    On Tue, Mar 31, 2009 at 2:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>    >U-Boot 1.1.6 is quite old (more than 2 years old) please try to the
>    current version
>    I know, but that's the one we use... For now, everything works fine.
Honnestly we will not work on such old code. so please really consider to
rebase it against mainline
> 
>    >is your SOC in the Mainline?
>    >if you can tell us which one it's and if it is mainline in U-Boot or
>    Linux?
>    >we could take a look on the code
>    Nope, actually it is a custom chip based on ARM9. Most of other things are
>    proprietery.
> 
>    >in linux yes in u-boot some arch do it but not the arm9
>    In Linux for sure, but we have MMU setup in Linux, and it is beyond my
>    knowledge. I am concentrated on as-simple-as-can-be DCache switch on, to
>    speed up operations of copying Linux image PRIOR to kernel boot.
first you may start to think to run in XIP to avoid the copy too
> 
>    >IMHO your boot problem is more in linux than in U-Boot
>    To be clear - I am experiencing long delay in reading peripheral regs. I
>    am reading some registers in a loop, so it takes long time for each
>    access.
>    After that I also noticed that giving a value to any variable takes long
>    time, so it makes me suspect that SDRAM access is very slow. For example,
>    calling get_timer(0) takes the time of over 1000 cycles!
> 
>    So, quite independantly of Linux, I want to speed up Flash and SDRAM R/W,
>    as well as R/W of peripherals regs in the loop by introducing DCache. Then
>    I saw that for ARM9 to enable DCache one must setup and enable MMU also,
>    and it becomes mess, because I can find any examples in U-Boot and it seem
>    pretty complex to me.
> 
>    To underline, my intention of enabling DCache in U-Boot has nothing to do
>    with Linux, because I will switch off caches anyway before boot. I just
>    want to use DCache while read and write operations prior to calling kernel
>    boot.
now it's more clear about what you try to do

yes on arm if you want to have access to the dcache you will have to set the
MMU first.

you can also have an overhead for the memory copy due to the fact it's code in
c ad not optimized in asm
> 
>    >but until we can take a look on the code it will be hard to known
>    Which code would help? I do not have anything yet regarding the setup. I
>    do not know where to start. For the time, I am examining CP15 coprocessor
>    manipulations in cpu/arm926, which enables/disables cache (even function
>    that you mentioned, cleanup_before_linux() is defined here).
>    In cpu/arm920t/cpu.c i found these lines, for example :

as mention precedently if you want to use the dcache you must first correctly
setup the MMU and the TLB

>    So, started digging with a hope that somebody alredy implemented this in
>    U-Boot, so I can copy/paste code in my cpu set-up, or, better yet, call a
>    set of C functions (similar to dcache_enable), to set-up MMU, and in the
>    end just call dcache_enable() to do the magic of enabling DCache.

if you want to use the dcache you must first correctly setup the MMU and the TLB

you may need to take a look on the arm1176/start.S

Best Regards,
J.