[U-Boot] [PATCH] OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000.

[Jean-Christophe PLAGNIOL-VILLARD]

On 11:19 Tue 17 Mar     , Dirk Behme wrote:
> Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000.
> Clean up macros and comments.
> 
> Signed-off-by: Dirk Behme <dirk.behme at googlemail.com>
> Signed-off-by: Manikandan Pillai <mani.pillai at ti.com>
> ---
> 
> Changes from Mani's original patch which is replaced by this [1]:
> 
> * Don't remove overflow handling in get_timer_masked()
> * Update omap3_zoom1.h, too.
> * Clean up timer related comments and macros in config files
> * Don't touch reset_timer_masked()
> * Switch divider clock divider from 256 to 8 to be able to get 1000Hz
> * Remove unused udelay_masked()
> * Minor clean up of get_tbclk()
> 
> [1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html
> 
> This patch is against U-Boot mainline commit
> 'b3dd629e78870ba2dc9f8032978721c0fa02a856'
> 'Prepare 2009.03-rc2'
> 
>  cpu/arm_cortexa8/omap3/interrupts.c |   50 +++++++++++-------------------------
>  include/configs/omap3_beagle.h      |   11 +++----
>  include/configs/omap3_evm.h         |   15 +++++-----
>  include/configs/omap3_overo.h       |   11 +++----
>  include/configs/omap3_pandora.h     |   11 +++----
>  include/configs/omap3_zoom1.h       |   11 +++----
>  6 files changed, 43 insertions(+), 66 deletions(-)
> 
> Index: u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c
> ===================================================================
> --- u-boot-main.orig/cpu/arm_cortexa8/omap3/interrupts.c
> +++ u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c
> @@ -169,7 +169,16 @@ static ulong timestamp;
>  static ulong lastinc;
>  static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
>  
> -/* nothing really to do with interrupts, just starts up a counter. */
> +/*
> + * Nothing really to do with interrupts, just starts up a counter.
> + * We run the counter with 13MHz, divided by 8, resulting in timer
> + * frequency of 1.625MHz. With 32bit counter register, counter
> + * overflows in ~44min
> + */
It will be better to use the 12Mhz source clock and set the divider to 4
so you will a a timer frequency to 3MHz and a perfect Match clock
it will overflow ealier but the timer will be exact

Best Regards,
J.