[U-Boot] DDR2 configuration in MPC85xx

[Werner Nedel]

Thanks for the advice. I'll try to set the correct configurations and adjust
my ddr.c.

On Fri, May 15, 2009 at 10:56 AM, Werner Nedel <wmnedel at gmail.com> wrote:

> Maybe I'm confusing DDR controller with SPD eeprom. My board have 2 SPDs in
> 0x51 and 0x53, one for each DIMM. I tought that I should set 2 DDR
> controllers to fsl_ddr_get_spd() takes the information of them in
> cpu/mpc8xxx/ddr/main.c.
>
> for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
>   fsl_ddr_get_spd(pinfo->spd_installed_dimms[i], i);
>
> }
>
> On Thu, May 14, 2009 at 10:01 PM, Liu Dave-R63238 <DaveLiu at freescale.com>wrote:
>
>> > Interesting. I've tried to use your patch but still hanging
>> > board_init_f.
>> > Even putting BOOKE_PAGESZ_256M in set_tlb the problem occur.
>>
>> Because you are using the 8548 with e500v2 core, so the bug doesn't
>> effect your board when you are using the 1G DIMMs.
>>
>
>