[U-Boot] [PATCH] OMAP3: Fix CKE1 MUX setting to allow self-refresh

[Dirk Behme]

The Beagle rev Cx and Overo boards are using both SDRC CSes. The MUX
setting is needed for the second CS clock signal to allow the 2 RAM
parts to be put in self-refresh correctly. This also works on rev B
Beagle boards with 128M of RAM.

From: Steve Sakoman <steve at sakoman.com>
From: Jean Pihet <jpihet at mvista.com>
Signed-off-by: Jean Pihet <jpihet at mvista.com>
Signed-off-by: Steve Sakoman <steve at sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme at googlemail.com>
---

 board/omap3/beagle/beagle.h |    2 +-
 board/omap3/overo/overo.h   |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Index: u-boot-main/board/omap3/overo/overo.h
===================================================================
--- u-boot-main.orig/board/omap3/overo/overo.h
+++ u-boot-main/board/omap3/overo/overo.h
@@ -376,6 +376,6 @@ const omap3_sysinfo sysinfo = {
  MUX_VAL(CP(D2D_MBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_mbusflag*/\
  MUX_VAL(CP(D2D_SBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_sbusflag*/\
  MUX_VAL(CP(SDRC_CKE0),		(IDIS | PTU | EN  | M0)) /*sdrc_cke0*/\
- MUX_VAL(CP(SDRC_CKE1),		(IDIS | PTD | DIS | M7)) /*sdrc_cke1*/
+ MUX_VAL(CP(SDRC_CKE1),		(IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
 #endif
Index: u-boot-main/board/omap3/beagle/beagle.h
===================================================================
--- u-boot-main.orig/board/omap3/beagle/beagle.h
+++ u-boot-main/board/omap3/beagle/beagle.h
@@ -371,7 +371,7 @@ const omap3_sysinfo sysinfo = {
  MUX_VAL(CP(D2D_MBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_mbusflag*/\
  MUX_VAL(CP(D2D_SBUSFLAG),	(IEN  | PTD | DIS | M0)) /*d2d_sbusflag*/\
  MUX_VAL(CP(SDRC_CKE0),		(IDIS | PTU | EN  | M0)) /*sdrc_cke0*/\
- MUX_VAL(CP(SDRC_CKE1),		(IDIS | PTD | DIS | M7)) /*sdrc_cke1*/
+ MUX_VAL(CP(SDRC_CKE1),		(IDIS | PTU | EN  | M0)) /*sdrc_cke1*/
 
 #define MUX_BEAGLE_C() \
  MUX_VAL(CP(MCBSP3_DX),		(IEN | PTD | DIS | M4)) /*GPIO_140*/\