[U-Boot] uBoot Debug: GPIO Toggling does not working over 8536DSuboot

[Liu Dave-R63238]

> CPU: MPC8536DS [Core E500, Freescale]
> Flash: 16MB [50MHz Local bus Clk)
> DDR: 1G (SODIMM, 400 MHz)
> Baord: Network Evaluation Cutom MPC8536E Board
> 
> U-Boot Debug Issue (GPIO Toggling code help)
> _________________________
> 
> -> as i am not able to debug uboot over jtag and the CW tool 
> till now, 　[MPC8536 CPU Suoort to the CW is not available now 
> it will be released in future.]
> 
> so i have to debug it via the printf statments meanwhile 
> after the UART initialization get over.
> But till when the UART initialization is not done so ihave to 
> check the Uboot process via the GPIO Togging. ;)
> 
> So when i wrote u-boot.bin file to the Flash via Jtag CW 
> FlashProgrammer tool, and power on the SW of te board it does 
> not bootup and the GPIO toggling is not over yet what i have to do .. 
> is my code to toggle the GPIO is wrong or i am mistaking 
> anything. (This code i am testing over MPC8536DS Calamari 
> baord, not working there too)
> 
> /cpu/mpc85xx/statrt.S
> 
> .....
> ....
> 	.section .bootpg,"ax"
> 	.globl _start_e500
> 
> _start_e500:
> 
> /* 20090520 DEBUG LED Code start */
> 	lis r2,ADR_CFG_GPIO at h
> 	ori r2,r2,ADR_CFG_GPIO at l
> 
> 	lis r3,DIR_GPIO at h
> 	ori r3,r3,DIR_GPIO at l
> 
> 	stw r3,0(r2)
> 	isync
> 	msync
> 
> 	lis r2,ADR_GPIO at h
> 	ori r2,r2,ADR_GPIO at l
> 
> 	lis r3,DAT_GPIO at h
> 	ori r3,r3,DAT_GPIO at l
> 	isync
> 	msync

No TLB set up for the GPIO address(FF70,....)
So you need have one TLB for CCSR space.

 
> and i declared the used macro in the file 
> ./include/configs/MPC8536DS.h
> 
> .......
> ....
> 
> #define ADR_CFG_GPIO		0xFF70FC00		/* GPIO 
> LED Configuration Register address */
> #define ADR_GPIO		0xFF70FC08		/* GPIO 
> LED Data Register */
> #define DIR_GPIO		0xFFFFFFFF		/* GPIO 
> DIRECTION though it is GPIO [0-15] */
> #define DAT_GPIO		0xF28FF28F              /* GPIO 
> Data GPIO[6-8] will set as toggle alternate */
> 
> .....
> ........