[U-Boot] [PATCH v2] fsl_pci_init_port end-point initialization is broken

[Kumar Gala]

commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct.  The function must return the first free
bus number for the next controller.

fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.

Signed-off-by: Ed Swarthout <Ed.Swarthout at freescale.com>
Acked-by: Vivek Mahajan <vivek.mahajan at freescale.com>
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
Guys, I want to revert commit 70ed869e and replace it with this.  There is
no reason to pass in pci_ep we can determine that internally.  I will also
change the board code to use fsl_is_pci_agent and kill off
is_fsl_pci_agent (post november u-boot release).

Can one of you test this out.

 - k

 drivers/pci/fsl_pci_init.c |   18 +++++++++++++++++-
 include/asm-ppc/fsl_pci.h  |    1 +
 2 files changed, 18 insertions(+), 1 deletions(-)

diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 87944bf..170cc25 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007-2009 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -42,6 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FSL_PCI_PBFR		0x44
 #define FSL_PCIE_CAP_ID		0x4c
 #define FSL_PCIE_CFG_RDY	0x4b0
+#define FSL_PROG_IF_AGENT	0x1

 void pciauto_prescan_setup_bridge(struct pci_controller *hose,
 				pci_dev_t dev, int sub_bus);
@@ -412,6 +413,16 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
 	}
 }

+int fsl_is_pci_agent(struct pci_controller *hose)
+{
+	u8 prog_if;
+	pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0);
+
+	pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if);
+
+	return (prog_if == FSL_PROG_IF_AGENT);
+}
+
 int fsl_pci_init_port(struct fsl_pci_info *pci_info,
 			struct pci_controller *hose, int busno)
 {
@@ -450,6 +461,11 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,

 	fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);

+	if (fsl_is_pci_agent(hose)) {
+		fsl_pci_config_unlock(hose);
+		hose->last_busno = hose->first_busno;
+	}
+
 	printf("    PCIE%x on bus %02x - %02x\n", pci_info->pci_num,
 			hose->first_busno, hose->last_busno);

diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h
index 2790da7..a5f72f5 100644
--- a/include/asm-ppc/fsl_pci.h
+++ b/include/asm-ppc/fsl_pci.h
@@ -25,6 +25,7 @@
 int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent);
 int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel);

+int fsl_is_pci_agent(struct pci_controller *hose);
 void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
 void fsl_pci_config_unlock(struct pci_controller *hose);
 void ft_fsl_pci_setup(void *blob, const char *pci_alias,
-- 
1.6.0.6