[U-Boot] [PATCH 2/4] ARM Add New Board GEC2410

Hui.Tang zetalabs at gmail.com
Wed Nov 4 09:46:23 CET 2009


Add ARM920T NAND flash booting.

checkpatch.pl shows that all things are fine.

total: 0 errors, 0 warnings, 70 lines checked

0002-ARM920T-NAND-flash-booting.patch has no obvious style problems and is ready for submission.

=========================================================
Signed-off-by: Hui.Tang <zetalabs at gmail.com>
---
 cpu/arm920t/start.S |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 114427a..9b08e3c 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -38,6 +38,7 @@
 
 .globl _start
 _start:	b	start_code
+#ifndef CONFIG_NAND_SPL
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -53,7 +54,13 @@ _data_abort:		.word data_abort
 _not_used:		.word not_used
 _irq:			.word irq
 _fiq:			.word fiq
+_pad:			.word 0x12345678 /* now 16*4=64 */
+#else
+	. = _start + 64
+#endif
 
+.global _end_vect
+_end_vect:
 	.balignl 16,0xdeadbeef
 
 
@@ -197,7 +204,11 @@ copy_loop:
 
 	/* Set up the stack						    */
 stack_setup:
+#ifndef CONFIG_NAND_SPL
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
+#else
+	ldr	r0, =(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
+#endif
 	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN	/* malloc area              */
 	sub	r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo                 */
 #ifdef CONFIG_USE_IRQ
@@ -215,9 +226,14 @@ clbss_l:str	r2, [r0]		/* clear loop...                    */
 	cmp	r0, r1
 	ble	clbss_l
 
+#ifndef CONFIG_NAND_SPL
 	ldr	pc, _start_armboot
 
 _start_armboot:	.word start_armboot
+#else
+	b	nand_boot
+/*	.word nand_boot */
+#endif
 
 
 /*
@@ -234,6 +250,7 @@ _start_armboot:	.word start_armboot
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
+#ifndef CONFIG_NAND_SPL
 	/*
 	 * flush v4 I/D caches
 	 */
@@ -250,6 +267,7 @@ cpu_init_crit:
 	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
 	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
 	mcr	p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_NAND_SPL */
 
 	/*
 	 * before relocating, we have to setup RAM timing
@@ -264,6 +282,7 @@ cpu_init_crit:
 	mov	pc, lr
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
+#ifndef CONFIG_NAND_SPL
 /*
  *************************************************************************
  *
@@ -434,3 +453,4 @@ fiq:
 	bl	do_fiq
 
 #endif
+#endif /* CONFIG_NAND_SPL */
-- 
1.6.0.4



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