[U-Boot] RAM burst mode problem

Frank Svendsbøe frank.svendsboe at gmail.com
Fri Sep 18 09:30:36 CEST 2009


On Thu, Sep 17, 2009 at 5:42 PM, Mikhail Zaturenskiy
<mzaturenskiy.st at gmail.com> wrote:
> We finally solved our DRAM timing problem so I wanted to follow up on
> my question.
>
> On Fri, Sep 4, 2009 at 1:41 AM, Frank Svendsbøe
> <frank.svendsboe at gmail.com> wrote:
>> Hi Mikhail,
>> Burst mode UPM setup is not trivial, and it is quite amount of work to
>> go through your table, so
>> I'm not surprised nobody has replied.
>
> I know, I'm not too surprised either :)
>
>
>> I assume you've verified the generated waveforms using a logic
>> analyzer/scope, and compared
>> them to the DRAMs datasheet (?).
>
> Unfortunately we do not have access to a decent scope nor a logic
> analyzer, that would certainly have been helpful.
>
>
>> If you have access to a Windows
>> machine, you could try an
>> ancient Motorola tool called UPM860. It might be helpful when
>> verifying your UPM program.
>
> Did take a look at that, though it did not appear to be as helpful as I hoped.
>
>
>> Good luck!
>> - Frank
>
> Thanks for your suggestions Frank, They did provide me with some food
> for thought.
>
> What the issue ended up being was us incorrectly setting the amx0/amx1
> bits of the "Exception" RAM word. After we fixed that we also found a
> nice document from Micron on DRAM timings which had slightly more
> efficient read/write section values than what we came up with, for
> those interested here is the link
> http://download.micron.com/pdf/technotes/TN4812.pdf . Now RAM burst
> reads/writes are finally working properly :)
>
> Mikhail Zaturenskiy
>

I'm impressed! You've solved your burst problem working in blind ;-)
Next time, consider buying/renting an analyzer/MSO.

It's strange you mentioned this certain Micron datasheet. It was the
same document that finally made me understand how address multiplexing
works on the 8xx. Far easier to understand than the Freescale ref. manual.

Now, consider supporting the community by commiting a patch containing
the working UPM table for this SDRAM ;-)

- Frank


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