[U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support

Liu Dave-R63238 DaveLiu at freescale.com
Sat Sep 19 02:00:45 CEST 2009


> > diff --git a/cpu/mpc85xx/cpu_init_nand.c 

> > +void cpu_init_f(void)
> > +{
> > +	ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
> > +
> > +	/*
> > +	 * LCRR - Clock Ratio Register - set up local bus timing
> > +	 * when needed
> > +	 */
> > +	out_be32(&lbc->lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
> > +
> > +#if defined(CONFIG_NAND_BR_PRELIM)  \
> > +	&& defined(CONFIG_NAND_OR_PRELIM)
> > +	out_be32(&lbc->br0, CONFIG_NAND_BR_PRELIM);
> > +	out_be32(&lbc->or0, CONFIG_NAND_OR_PRELIM);
> > +	/* for FPGA */
> > +	out_be32(&lbc->br3, CONFIG_SYS_BR3_PRELIM);
> > +	out_be32(&lbc->or3, CONFIG_SYS_OR3_PRELIM);
> > +#else
> > +#error  CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must 
> be defined
> > +#endif
> > +
> 
> Should we not have br/or1, br/or2, etc?
> 

And FPGA stuff put here cpu/mpc85xx.....
It is *not* good practice and should be move out from here.
I know the FPGA is for UART clock.


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