[U-Boot] [PATCH v4 1/7] ppc/p4080: Add p4080 platform immap definitions

Kumar Gala galak at kernel.crashing.org
Wed Sep 23 22:41:20 CEST 2009


On Sep 23, 2009, at 1:37 PM, Wolfgang Denk wrote:

> Dear Kumar Gala,
>
> In message <1253380099-27864-1-git-send-email-galak at kernel.crashing.org 
> > you wrote:
>> The p4080 SoC has a significant amount of commonality with the 85xx/ 
>> PQ3
>> platform.  We reuse the 85xx immap and just add new definitions for
>> local access and global utils.  The global utils is now broken into
>> global utils, clocking and run control/power management.
>>
>> The offsets from CCSR for a number of blocks have also changed.  We
>> introduce the CONFIG_FSL_CORENET define to distinquish the PQ3  
>> style of
>> platform from the new p4080 platform.  We don't use QoirQ as there  
>> are
>> products (like p2020) that are PQ3 based platforms but have the QoirQ
>> name.
>>
>> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
>> ---
>> include/asm-ppc/fsl_lbc.h    |    4 +
>> include/asm-ppc/immap_85xx.h |  287 ++++++++++++++++++++++++++++++++ 
>> +++++++---
>> 2 files changed, 271 insertions(+), 20 deletions(-)
>
> Why are you reposting? What was changed compared to v3?
>
>> diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h
>> index 08d31e1..5723de6 100644
>> --- a/include/asm-ppc/fsl_lbc.h
>> +++ b/include/asm-ppc/fsl_lbc.h
>> @@ -317,6 +317,10 @@
>> #define LCRR_CLKDIV_2			0x00000002
>> #define LCRR_CLKDIV_4			0x00000004
>> #define LCRR_CLKDIV_8			0x00000008
>> +#elif defined(CONFIG_FSL_CORENET)
>> +#define LCRR_CLKDIV_8			0x00000002
>> +#define LCRR_CLKDIV_16			0x00000004
>> +#define LCRR_CLKDIV_32			0x00000008
>> #else
>> #define LCRR_CLKDIV_4			0x00000002
>> #define LCRR_CLKDIV_8			0x00000004
>> diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/ 
>> immap_85xx.h
>> index e7d412d..3e6ed85 100644
>> --- a/include/asm-ppc/immap_85xx.h
>> +++ b/include/asm-ppc/immap_85xx.h
>> @@ -16,6 +16,29 @@
>> #include <asm/fsl_i2c.h>
>> #include <asm/fsl_lbc.h>
>>
>> +typedef struct ccsr_local {
>> +	u32	ccsrbarh;	/* 0x0 - Control Configuration Status Registers  
>> Base Address Register High */
>> +	u32	ccsrbarl;	/* 0x4 - Control Configuration Status Registers  
>> Base Address Register Low */
>> +	u32	ccsrar;		/* 0x8 - Configuration, Control, and Status  
>> Attribute Register */
>> +#define CCSRAR_C	0x80000000	/* Commit */
>
> Seems my previous comments still apply - lines are wayyyyy to long.

Dope, posted the wrong version.  I agree w/the long lines, not sure  
what to do about it.  Move to something like:

typedef struct ccsr_local {
	/* 0x0 - Control Configuration Status Registers Base Address Register  
High */
	u32	ccsrbarh;	
	/* 0x4 - Control Configuration Status Registers Base Address Register  
Low */
	u32	ccsrbarl;	

...

even this exceeds the 80 column limit.

- k


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