[U-Boot] [PATCH 3/3] arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO init
Tom Warren
twarren.nvidia at gmail.com
Wed Apr 13 22:07:38 CEST 2011
Signed-off-by: Tom Warren <twarren at nvidia.com>
---
board/nvidia/common/board.c | 32 +++++++++++++++--------
board/nvidia/common/board.h | 4 +++
board/nvidia/harmony/Makefile | 1 +
board/nvidia/harmony/harmony.c | 34 ++++++++++++++++++++++++
board/nvidia/seaboard/Makefile | 1 +
board/nvidia/seaboard/seaboard.c | 52 ++++++++++++++++++++++++++++++++++++++
6 files changed, 113 insertions(+), 11 deletions(-)
create mode 100644 board/nvidia/harmony/harmony.c
create mode 100644 board/nvidia/seaboard/seaboard.c
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 5edd70f..3d6c248 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -41,7 +41,16 @@ const struct tegra2_sysinfo sysinfo = {
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- debug("Board Early Init\n");
+ /* Initialize periph clocks */
+ clock_init();
+
+ /* Initialize periph pinmuxes */
+ pinmux_init();
+
+ /* Initialize periph GPIOs */
+ gpio_init();
+
+ /* Init UART, scratch regs, and start CPU */
tegra2_start();
return 0;
}
@@ -64,10 +73,10 @@ int timer_init(void)
static void clock_init_uart(void)
{
struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- static int pllp_init_done;
u32 reg;
- if (!pllp_init_done) {
+ reg = readl(&clkrst->crc_pllp_base);
+ if (!(reg & PLL_BASE_OVRRIDE)) {
/* Override pllp setup for 216MHz operation. */
reg = (PLL_BYPASS | PLL_BASE_OVRRIDE | PLL_DIVP);
reg |= (((NVRM_PLLP_FIXED_FREQ_KHZ/500) << 8) | PLL_DIVM);
@@ -78,8 +87,6 @@ static void clock_init_uart(void)
reg &= ~PLL_BYPASS;
writel(reg, &clkrst->crc_pllp_base);
-
- pllp_init_done++;
}
/* Now do the UART reset/clock enable */
@@ -182,6 +189,15 @@ void pinmux_init(void)
}
/*
+ * Routine: gpio_init
+ * Description: Do individual peripheral GPIO configs
+ */
+void gpio_init(void)
+{
+ gpio_config_uart();
+}
+
+/*
* Routine: board_init
* Description: Early hardware init.
*/
@@ -192,11 +208,5 @@ int board_init(void)
/* board id for Linux */
gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
- /* Initialize peripheral clocks */
- clock_init();
-
- /* Initialize periph pinmuxes */
- pinmux_init();
-
return 0;
}
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 47c7885..350bc57 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -25,5 +25,9 @@
#define _BOARD_H_
void tegra2_start(void);
+void clock_init(void);
+void pinmux_init(void);
+void gpio_init(void);
+void gpio_config_uart(void);
#endif /* BOARD_H */
diff --git a/board/nvidia/harmony/Makefile b/board/nvidia/harmony/Makefile
index 3a146cb..9fb6b57 100644
--- a/board/nvidia/harmony/Makefile
+++ b/board/nvidia/harmony/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
+COBJS := $(BOARD).o
COBJS += ../common/board.o
SRCS := $(COBJS:.o=.c)
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
new file mode 100644
index 0000000..f1ab050
--- /dev/null
+++ b/board/nvidia/harmony/harmony.c
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra2.h>
+
+/*
+ * Routine: gpio_config_uart
+ * Description: Does nothing on Harmony - no conflict w/SPI.
+ */
+void gpio_config_uart(void)
+{
+}
diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile
index 3a146cb..9fb6b57 100644
--- a/board/nvidia/seaboard/Makefile
+++ b/board/nvidia/seaboard/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
+COBJS := $(BOARD).o
COBJS += ../common/board.o
SRCS := $(COBJS:.o=.c)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
new file mode 100644
index 0000000..4b9a8f3
--- /dev/null
+++ b/board/nvidia/seaboard/seaboard.c
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2010,2011
+ * NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra2.h>
+#include <asm/arch/gpio.h>
+
+/*
+ * Routine: gpio_config_uart
+ * Description: Force GPIO_PI3 low on Seaboard so UART4 works.
+ */
+void gpio_config_uart(void)
+{
+ int gp = GPIO_PI3;
+ struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
+ u32 val;
+
+ /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
+ val = readl(&bank->gpio_config[GPIO_PORT(gp)]);
+ val |= 1 << GPIO_BIT(gp);
+ writel(val, &bank->gpio_config[GPIO_PORT(gp)]);
+
+ val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
+ val &= ~(1 << GPIO_BIT(gp));
+ writel(val, &bank->gpio_out[GPIO_PORT(gp)]);
+
+ val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
+ val |= 1 << GPIO_BIT(gp);
+ writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
+}
--
1.7.4.3
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