[U-Boot] [PATCH 2/3] arm: Tegra2: GPIO: Add basic GPIO functionality

[Tom Warren]

Albert,

On Wed, Apr 13, 2011 at 1:14 PM, Albert ARIBAUD
<albert.u.boot at aribaud.net> wrote:
> Hi Tom,
>
> Le 13/04/2011 22:07, Tom Warren a écrit :
>>
>> Signed-off-by: Tom Warren<twarren at nvidia.com>
>> ---
>>  arch/arm/include/asm/arch-tegra2/gpio.h   |   59
>> +++++++++++++++++++++++++++++
>>  arch/arm/include/asm/arch-tegra2/tegra2.h |    1 +
>>  2 files changed, 60 insertions(+), 0 deletions(-)
>>  create mode 100644 arch/arm/include/asm/arch-tegra2/gpio.h
>>
>> diff --git a/arch/arm/include/asm/arch-tegra2/gpio.h
>> b/arch/arm/include/asm/arch-tegra2/gpio.h
>> new file mode 100644
>> index 0000000..0fb8f0d
>> --- /dev/null
>> +++ b/arch/arm/include/asm/arch-tegra2/gpio.h
>> @@ -0,0 +1,59 @@
>> +/*
>> + * Copyright (c) 2011, Google Inc. All rights reserved.
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#ifndef _TEGRA2_GPIO_H_
>> +#define _TEGRA2_GPIO_H_
>> +
>> +/*
>> + * The Tegra 2x GPIO controller has 222 GPIOs arranged in 8 banks of 4
>> ports,
>> + * each with 8 GPIOs.
>> + */
>> +#define TEGRA_GPIO_PORTS 4   /* The number of ports per bank */
>> +#define TEGRA_GPIO_BANKS 8   /* The number of banks */
>> +
>> +/* GPIO Controller registers for a single bank */
>> +struct gpio_ctlr_bank {
>> +       uint gpio_config[TEGRA_GPIO_PORTS];
>> +       uint gpio_dir_out[TEGRA_GPIO_PORTS];
>> +       uint gpio_out[TEGRA_GPIO_PORTS];
>> +       uint gpio_in[TEGRA_GPIO_PORTS];
>> +       uint gpio_int_status[TEGRA_GPIO_PORTS];
>> +       uint gpio_int_enable[TEGRA_GPIO_PORTS];
>> +       uint gpio_int_level[TEGRA_GPIO_PORTS];
>> +       uint gpio_int_clear[TEGRA_GPIO_PORTS];
>> +};
>> +
>> +struct gpio_ctlr {
>> +       struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];
>> +};
>> +
>> +#define GPIO_BANK(x)   ((x)>>  5)
>> +#define GPIO_PORT(x)   (((x)>>  3)&  0x3)
>> +#define GPIO_BIT(x)    ((x)&  0x7)
>> +
>> +/*
>> + * GPIO_PI3 = Port I = 8, bit = 3.
>> + * Seaboard: used for UART/SPI selection
>> + * Harmony: not used
>> + */
>> +#define GPIO_PI3       ((8<<  3) | 3)
>> +
>> +#endif /* TEGRA2_GPIO_H_ */
>> diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h
>> b/arch/arm/include/asm/arch-tegra2/tegra2.h
>> index 7b0f5cc..742a75a 100644
>> --- a/arch/arm/include/asm/arch-tegra2/tegra2.h
>> +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h
>> @@ -30,6 +30,7 @@
>>  #define NV_PA_TMRUS_BASE      0x60005010
>>  #define NV_PA_CLK_RST_BASE    0x60006000
>>  #define NV_PA_FLOW_BASE               0x60007000
>> +#define NV_PA_GPIO_BASE                0x6000D000
>>  #define NV_PA_EVP_BASE                0x6000F000
>>  #define NV_PA_APB_MISC_BASE   0x70000000
>>  #define NV_PA_APB_UARTA_BASE  (NV_PA_APB_MISC_BASE + 0x6000)
>
> These are header files only, and they do not even contain function-like
> macros, so where is the functionality exactly?
In the next patch (3/3) - the macros are used in seaboard.c to drive
the UART_DISABLE GPIO low to enable the UART in U-Boot POST.

>
> Amicalement,
> --
> Albert.
>

Tom