[U-Boot] [PATCH] CPCI750: Do not enable data cache in start.S

[Wolfgang Denk]

Dear Reinhard Arlt,

In message <4EC6A8E3.7050302 at esd.eu> you wrote:
> From: Reinhard Arlt <reinhard.arlt at esd.eu>
> 
> Do not enable the data cache in start.S, the decrementer do not work.
> 
> Signed-off-by: Reinhard Arlt <reinhard.arlt at esd.eu>
> 
> --
> 
> diff --git a/arch/powerpc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S
> index 75fb773..131fc14 100644
> --- a/arch/powerpc/cpu/74xx_7xx/start.S
> +++ b/arch/powerpc/cpu/74xx_7xx/start.S
> @@ -247,11 +247,12 @@ in_flash:
>  	/* enable address translation */
>  	bl	enable_addr_trans
>  	sync
> -
> +#if !defined(CONFIG_CPCI750)
>  	/* enable and invalidate the data cache */
>  	bl	l1dcache_enable
>  	sync
>  #endif
> +#endif
>  #ifdef CONFIG_SYS_INIT_RAM_LOCK
>  	bl	lock_ram_in_cache
>  	sync

Sorry, but I don't want to have board specific code in
arch/powerpc/cpu/74xx_7xx/start.S

Please turn this into a feature dependent define, if it is really
needed.

Also, can you provide a rational explanation how the decrementer
depends on data cache being enabled?  This sounds pretty strange to
me.

Best regards,

Wolfgang Denk

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